Jiafei Pan af2f497ad0 soc: imx8mm/n: fix pinctrl field shifting value ... The lowest bit in DSE and FSEL field of pinctl register is not used in the register and dts binding definitions also don't conver this bit, so shift one more bit to align with actual register definitions. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>		2025-02-26 22:05:29 +00:00
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common	soc: nxp: imxrt: imxrt7xx: add rt7xx soc files	2025-01-14 17:56:53 +01:00
imx	soc: imx8mm/n: fix pinctrl field shifting value	2025-02-26 22:05:29 +00:00
imxrt	drivers: ethernet: Remove deprecated eth_mcux	2025-02-26 22:04:26 +00:00
kinetis	drivers: ethernet: Remove deprecated eth_mcux	2025-02-26 22:04:26 +00:00
layerscape	soc: Remove re-defining some defined types	2024-11-18 07:41:23 -05:00
lpc	soc: nxp: fix spelling of "manual"	2025-02-21 11:41:46 +00:00
mcx	soc: nxp: mcxw: update conditions to account for ieee driver	2025-02-14 03:08:48 +01:00
rw	soc: nxp: rw: Update system core clock frequency	2025-02-21 11:41:56 +00:00
s32	arch: arm: rename CPU_HAS_NXP_MPU to align with binding	2024-12-06 22:23:06 +01:00