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105559 commits

Author SHA1 Message Date
Jakub Wasilewski
84434ba006 arch: riscv: add Kconfig option for imprecise FPU state tracking
According to the RISC-V Instruction Set Manual: Volume II, Version 20240411
(Section 3.1.6.6), some implementations may choose to track the dirtiness
of the floating-point register state imprecisely by reporting the state to
be dirty even when it has not been modified. This option reflects that.

Also add a filter in `tests/arch/riscv/fpu_sharing/` based on imprecise
FPU state tracking

Signed-off-by: Jakub Wasilewski <jwasilewski@internships.antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-11-20 10:15:03 +00:00
Jakub Wasilewski
939e94076d boards: hifive_unleashed: switch zephyr SRAM region from DDR to L2LIM
Switch from `ram0` to `l2lim` in `zephyr, sram` in board DTS

Add `l2lim` in `support/hifive_unleashed.resc` and targets l2lim
as a work-area in `openocd_hifive_unleashed.cfg`

Signed-off-by: Jakub Wasilewski <jwasilewski@internships.antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2024-11-20 10:15:03 +00:00
TOKITA Hiroshi
43db55a79b drivers: clock_contrl: Remove renesas,ra-clock-generation-circuit driver
Remove the renesas,ra-clock-generation-circuit driver, which is no longer
needed after migrating to the FSP-based implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-11-20 10:14:41 +00:00
TOKITA Hiroshi
f0219c35da drivers: pinctrl: Remove renesas,ra-pinctrl driver
Remove the renesas,ra-pinctrl driver, which is no longer
needed after migrating to the FSP-based implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-11-20 10:14:41 +00:00
TOKITA Hiroshi
8fe5544948 boards: arduino: uno_r4: remove CONFIG_PINCTRL from defconfig of uno_r4
This PR fixes #78619 for the Arduino UNO R4 Minima/Wifi board.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-11-20 10:14:41 +00:00
TOKITA Hiroshi
ffe6099fed boards: arduino: uno_r4: Migrate to FSP
Update configuration for migrate to FSP

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-11-20 10:14:41 +00:00
TOKITA Hiroshi
6376ee15be boards: mikroe: clicker_ra4m1: Migrate to FSP
Update configuration for migrate to FSP

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-11-20 10:14:41 +00:00
TOKITA Hiroshi
183273ed3f dts: arm: renesas: ra4: Use renesas,ra-cgc-pclkblock driver
Switch the clock controller driver to renesas,ra-cgc-pclkblock
which can be used with FSP.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-11-20 10:14:41 +00:00
TOKITA Hiroshi
397c48a13e dts: arm: renesas: ra4: Use renesas,ra-pinctrl-pfs driver
Switch the pinctrl driver to renesas,ra-pinctrl-pfs which can be
used with FSP.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-11-20 10:14:41 +00:00
TOKITA Hiroshi
af2021ea4c soc: renesas: ra: ra4m1: Adapts the Option Setting Memory to FSP.
Since the Option Setting Memory area is set in FSP, the Kconfig value
switches between using the FSP implementation or the existing
Option Setting Memory implementation.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-11-20 10:14:41 +00:00
TOKITA Hiroshi
c968d4eb81 soc: renesas: ra: ra4m1: Migrate to FSP-based configuration
Change to use FSP to integrate with other Renesas RA series.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2024-11-20 10:14:41 +00:00
Anas Nashif
3364a35f05 Revert "irq: multilevel: compile 3rd level IRQ APIs only when enabled"
This reverts commit 2152b8e414.

This commit is breaking CI.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-11-19 22:40:13 -05:00
Anas Nashif
c3b2f44173 ci: testplan: do not deal with arch changes
This is generating lots of duplication and unnecessary builds when
multiple arches are being changed. Let's stick to basic coverage which
should be enough for PRs.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-11-19 22:25:18 -05:00
Jordan Yates
b8360ad5ee sys_clock: extra time defines
Add additional time defines to round out the `SEC_PER_*` family.
These are easier to type than `SEC_PER_MIN * MIN_PER_HOUR` and
`SEC_PER_MIN * MIN_PER_HOUR * HOUR_PER_DAY`.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2024-11-19 20:05:08 -05:00
Alberto Escolar Piedras
d703d9077f doc: 4.1 release & migration guide: Add native deprecation
Mention that CONFIG_NATIVE_APPLICATION &
CONFIG_NATIVE_SIM_NATIVE_POSIX_COMPAT have been deprecated.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-11-19 20:04:55 -05:00
Alberto Escolar Piedras
b77d896ff6 boards native_sim: Deprecate CONFIG_NATIVE_SIM_NATIVE_POSIX_COMPAT
This option existed only to make the transition from native_posix to
native_sim easier. As native_posix is going to be removed in v4.2
we deprecate this option now, so it will also be removed.

We also switch this option to default to false already now.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-11-19 20:04:55 -05:00
Alberto Escolar Piedras
c4b7b684dc boards native: Deprecate CONFIG_NATIVE_APPLICATION
This option is used in tree only by native_posix, which is deprecated
and being replaced by native_sim. But may be used also in out of tree
targets.
As part of the native_posix deprecation, and therefore the lack of
testing this feature would have in the future, we are also deprecating
this option.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2024-11-19 20:04:55 -05:00
Yong Cong Sin
2152b8e414 irq: multilevel: compile 3rd level IRQ APIs only when enabled
This revert the idea of 3fa7d78 from #78845.

The 3rd level IRQ APIs won't compile when
CONFIG_3RD_LEVEL_INTERRUPT_BITS=0.

Updated testcase accordingly.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-11-19 20:04:32 -05:00
Sylvio Alves
fecf909a2a revert "boards: m5stack/m5stack_cores3: disable in twister"
This reverts commit 410c8a57e0 so that
m5stack_cores3 can be tested properly.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-11-19 20:03:55 -05:00
Sylvio Alves
d2a0c3315e boards: m5stack_cores3: update documentation
Modify this board docs to meet latest changes.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-11-19 20:03:55 -05:00
Sylvio Alves
6672e673b3 boards: m5stack_cores3: fix board configuration
This board has a few issues handled by this PR:
- Fix DTS entries to meet necessary flash partitions
- Fix wrong kconfig entries realted to SoC model

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2024-11-19 20:03:55 -05:00
Anas Nashif
fd4c7bbbc2 Revert "ci: twister: use workflow_call for prep job"
This reverts commit ac08acafdd.

Pull requests not working as expected.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-11-19 19:49:21 -05:00
Anas Nashif
2f0fcdf81c ci: twister: do not fail if there are no artifacts
Do not fail if we can't download any artifacts, i.e. when job is
cancelled.

Only publish on push/schedule

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-11-19 19:49:21 -05:00
Pieter De Gendt
1be5c157d9 scripts: ci: check_compliance: Add python lint/format check
Add a compliance test using ruff, for both linting and formatting of
newly added python files.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2024-11-19 18:36:54 -05:00
Pieter De Gendt
973eaff5a2 scripts: ci: Add ruff configuration files
Add a baseline toml file for current rule violations, and a default
configuration file.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2024-11-19 18:36:54 -05:00
Pieter De Gendt
4db97b5bb6 scripts: Add helper scripts for ruff baseline excludes
Add simple scripts to convert ruff check and ruff format output to
toml exclude sections.

These sections can be used to ignore baseline violations for an existing
codebase.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2024-11-19 18:36:54 -05:00
Pieter De Gendt
05c6517fc9 scripts: ci: check_compliance: Add support for end line and column
Reporting or annotating issues can be done on a range rather than a
single line.

Add support for end line and end column.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2024-11-19 18:36:54 -05:00
Lucien Zhao
95448ba21d boards: nxp: mimxrt1180_evk: set lptmr1 status as OK
set lptmr1 status as OK
test counter_basic_api passed on cm33/cm7 cores

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2024-11-19 18:36:31 -05:00
Lucien Zhao
e5ee95893c dts: arm: nxp: rt118x: add lptmr instances
Config/Enable lptmr1/2/3 clock
Add 3 lptmr instances for RT118X

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2024-11-19 18:36:31 -05:00
Bryce Wilkins
dacc462bbd west.yml: segger: RTT control block init mode Kconfigs
Kconfig options for RTT control block initialization and linker
section were added in #53569, however the Zephyr west.yml was not
updated to incorporate the Segger repository changes to make use
of the new Kconfig options.

This fixes that.

Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
2024-11-19 18:35:45 -05:00
Daniel DeGrasse
71c80932a9 tests: drivers: build_all: display: fix conflicting nodelabels
Some nodelabels in the display build_all test overlay lacked a "test"
prefix, causing test failures on boards that also define displays with
this nodelabel. Prefix these nodes with "test" to resolve this issue.

Fixes #81610

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-11-19 18:35:32 -05:00
Benjamin Cabé
83356e924a doc: doxygen: improve formatting for kconfig alias
\verbatim is not giving the right output as we need an inline literal.
Switch to \c instead.

Fixes #81595.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2024-11-19 18:35:18 -05:00
Anas Nashif
71bb882221 tests: cpp: remove obsolete target
nrf54h20dk@0.8.0/nrf54h20/cpuapp was dropped.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-11-19 18:21:19 -05:00
Tomasz Moń
e3acf5fa04 drivers: udc_nrf: handle overwritten Set Address commands
USBD peripheral automatically handles Set Address command which can
lead to state mismatch between USB stack and the host. Keep track of
device address and issue fake Set Address commands on mismatch.

This fixes default vs addressed state mismatch that can occur due to
sufficently high SETUP handling latency. The state mismatch was most
commonly seen as SET CONFIGURATION failure when the enumeration happened
during periods with increased latency.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2024-11-19 18:12:04 -05:00
Tomasz Moń
54dc01153c usb: device_next: check wIndex on Set Address
Set Address behavior is not specified when wValue is greater than 127,
or if wIndex or wLength are non-zero. USB stack did check wValue and
wLength but didn't care about wIndex value. Extend the check so non-zero
wIndex also results in STALL response.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2024-11-19 18:12:04 -05:00
James Roy
e569dfe175 doc: build: dts: Fix incorrect rst tag
Replaced incorrect ':c:func:' tag for devicetree macro
with ':c:macro' tag.

Signed-off-by: James Roy <rruuaanng@outlook.com>
2024-11-19 18:10:16 -05:00
Krzysztof Chruściński
0852af215b drivers: pinctrl: nrf: Optimize access to gpd service
Request and release global power domain only once during setup
of pins. Request and release involves communication over IPC and
it should be avoided if possible. For example if there are 4 pins
(like in UART) where GPD is requested we can limit number of
request/release operations fourfold.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-11-19 18:09:47 -05:00
DineshKumar Kalva
749192a9fb Board: amd : add board support for the Audio DSP on ACP_6_0 soc.
Create a acp_6_0_adsp board support for
the Audio DSP on ACP soc.

Signed-off-by: DineshKumar Kalva <DineshKumar.Kalva@amd.com>
2024-11-19 17:53:11 -05:00
DineshKumar Kalva
173cc387a0 soc: amd: acp_6_0: add support for AMD ACP_6_0 soc.
Add a common part for AMD board ACP_6_0_ADSP.

Add support for ACP_6_0_ADSP BOARD,
which represents ACP_6_0 soc.

This has a 1 Xtensa HiFi5 core, with 200-800MHz
1.75 MB HP SRAM / 512 KB IRAM/DRAM,
1 x SP (I2S, PCM), 1 x BT (I2S, PCM), 1 x HS(I2S, PCM), DMIC as
audio interfaces.

Signed-off-by: DineshKumar Kalva <DineshKumar.Kalva@amd.com>
2024-11-19 17:53:11 -05:00
DineshKumar Kalva
eb9eff7018 west: sign: add support for AMD acp_6_0_adsp board.
Add support for signing acp_6_0 SOF with Zephyr images with rimage.

Signed-off-by: DineshKumar Kalva <DineshKumar.Kalva@amd.com>
2024-11-19 17:53:11 -05:00
DineshKumar Kalva
f64f36cb01 CODEOWNERS: add codeowner for SOF with Zephyr on AMD ACP_6_0.
Add myself and basavaraj as codeowners for ACP_6_0 related files
for SOF with Zephyr OS.

Signed-off-by: DineshKumar Kalva <DineshKumar.Kalva@amd.com>
2024-11-19 17:53:11 -05:00
Krzysztof Chruściński
662f412a35 tests: drivers: uart: async_api: Add nrf54h20 cpuppr
Add configuration for nrf54h20dk/nrf54h20/cpuppr.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2024-11-19 17:52:33 -05:00
Neil Chen
e5f0075dc6 board: frdmmcxc444: Add uart support
Add UART configuration and pin control. Set state to disabled,
as it serves as alternative to default LPUART0 or as second
uart only.

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2024-11-19 17:52:25 -05:00
Sergei Ovchinnikov
55c6a0eaa5 drivers: sensor: npm1300_charger: expose VBUS status
Add possibility to retrieve VBUS status of the nPM1300 charger through
its sensor APIs. Updated shields/npm1300_ek sample to use the new API.

Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
2024-11-19 17:51:13 -05:00
Pisit Sawangvonganan
d81a8d452e drivers: ethernet: w5500: improve type consistency
Improve type safety and consistency by adjusting variable and
parameter types to avoid signed/unsigned comparisons and implicit casts.

Moreover, explicit casts were applied when converting from
`size_t` to `uint16_t`.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-11-19 17:50:58 -05:00
Pisit Sawangvonganan
82e2709ed8 drivers: ethernet: w5500: make ethernet_api as const
This change marks `w5500_api_funcs`, an instance of
the `ethernet_api`, as `const`.

By using `const`, we ensure immutability, leading to usage of only
`.rodata` and a reduction in the `.data` area.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2024-11-19 17:50:58 -05:00
Nazar Palamar
6172092730 test: arm: irq: Add overlays files for Infineon boards
Changed interrupt priority for GPIO, default 6 is not suitable for
for the ZERO_LATENCY_IRQS function used in this test.
used in this test.

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2024-11-19 17:50:44 -05:00
Nazar Palamar
697efe8b50 Infineon: board: Add CONFIG_GPIO to defconfigs
Add CONFIG_GPIO from defconfigs for Infineon boards.

Revert pull/81377, which affect some ble samples which
used GPIO.

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2024-11-19 17:50:44 -05:00
Daniel DeGrasse
35f6c4922e dts: bindings: timer: move a few counter bindings to correct location
A few bindings in the timer directory (for kernel timing sources) were
being used for counters (which can have alarms set, and have a distinct
API). Move these bindings to the counters directory.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2024-11-19 17:50:04 -05:00
Anas Nashif
ac08acafdd ci: twister: use workflow_call for prep job
Use workflow_call to allow for different type of nodes depending on
event.

On push, we do not need to use zephyr runners, GH runners are enough and
are much faster to deploy and start.

This resolves an issue where push jobs will have to be queued for a
longer time waiting for the prep step, once the prep step is done, we
will have to wait one more time in the queue for requested nodes.

This should speed up execution of push events in CI.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-11-19 17:48:11 -05:00