arch: riscv: add Kconfig option for imprecise FPU state tracking

According to the RISC-V Instruction Set Manual: Volume II, Version 20240411
(Section 3.1.6.6), some implementations may choose to track the dirtiness
of the floating-point register state imprecisely by reporting the state to
be dirty even when it has not been modified. This option reflects that.

Also add a filter in `tests/arch/riscv/fpu_sharing/` based on imprecise
FPU state tracking

Signed-off-by: Jakub Wasilewski <jwasilewski@internships.antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
This commit is contained in:
Jakub Wasilewski 2024-07-09 13:25:46 +02:00 committed by Fabio Baltieri
commit 84434ba006
2 changed files with 11 additions and 1 deletions

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@ -1,4 +1,5 @@
# Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
# Copyright (c) 2024 Antmicro <www.antmicro.com>
# SPDX-License-Identifier: Apache-2.0
menu "RISCV Options"
@ -375,6 +376,15 @@ config NULL_POINTER_EXCEPTION_REGION_SIZE
endif # NULL_POINTER_EXCEPTION_DETECTION_PMP
config RISCV_IMPRECISE_FPU_STATE_TRACKING
bool "Imprecise implementation of FPU state tracking"
depends on FPU
help
According to the RISC-V Instruction Set Manual: Volume II, Version 20240411
(Section 3.1.6.6), some implementations may choose to track the dirtiness of
the floating-point register state imprecisely by reporting the state to be
dirty even when it has not been modified. This option reflects that.
endmenu
config MAIN_STACK_SIZE

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@ -1,4 +1,4 @@
tests:
arch.riscv.fpu_sharing:
arch_allow: riscv
filter: CONFIG_CPU_HAS_FPU
filter: CONFIG_CPU_HAS_FPU and not CONFIG_RISCV_IMPRECISE_FPU_STATE_TRACKING