General refactoring to clean up and futureproof this driver.
Remove false dependency on CONFIG_CAVS_ICTL. This requires the CAVS
interrupt mask API, but doesn't touch the interrupt controller driver.
Remove a racy check for simultaneous interrupts. This seems to have
been well intentioned, but it's needless: the spinlock around the
last_count computation guarantees that colliding interrupts will
correctly compute elapsed ticks (i.e. the last will compute and
announce zero ticks, which is correct and expected). And this opened
a tiny window where you could incorrectly ignore a just-set timeout.
Factor out the specific registers used (there are only five) into
pointer-valued macros instead of banging them directly.
Unify interrupt initialization for main and auxiliary cores.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The weak symbol sys_clock_driver_init has been removed, therefore moving
the init responsability to the drivers themselves. As a result, the init
function has now been made static on all drivers and moved to the
bottom, following the convention used in other areas.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Each platform was defining its own shim.h header, with slightly
variant field definitions, for a register block that is almost
completely compatible between versions. This is made worse by the
fact that these represent an API imported fairly early from SOF, the
upstream version of which has since diverged.
Move the existing shim struct into a header ("cavs-shim.h") of its
own, remove a bunch of unused symbols, fill in definitions for some
registers that were left out, correct naming to match the hardware
docs in a few places, make sure all hardware dependencies are source
from devicetree only, and modify existing usage to use the new API
exclusively.
Interestingly this leaves the older shim.h header in place, as it
turns out to contain definitions for a bunch of things that were never
part of the shim register block. Those will be unified in separate
patches.
Finally: note that the existing IPM_CAVS_IDC driver (soon to be
removed from all the intel_adsp soc's) is still using the old API, so
redeclare the minimal subset that it needs for the benefit of the
platforms in transition.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Recent work to this platform added a new, cleaner low level API to the
interrupt controller. Replace the hand-cooked register access with
that. This is still not as good as having proper multicore support in
the intc_cavs driver, but it's at least better.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
In commit 918a574c88 ("clock: add k_cycle_get_64") this driver was
augmented with a count64() method to get a 64 bit cycle output from
the two-32-bit-word device registers.
Unfortunately it appeared to be trying to use a spinlock around the
two (low/high) reads to protect against overflow. But that doesn't
work: spinlocks protect against other CPU code using the same
spinlock, not against a hardware counter that is incrementing in real
time!
Thankfully there was already a count() routine in place that does a
detect-overflow-and-retry loop to solve this. Use that.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This change adds `k_cycle_get_64()` on platforms that
support a 64-bit cycle counter.
The interface functions `arch_k_cycle_get_64()` and
`sys_clock_cycle_get_64()` are also introduced.
Fixes#39934
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
This function wasn't being defined when SMP_BOOT_DELAY was set or when
SMP wasn't enabled. There's no reason for either, then function
doesn't depend on any kconfig-dependent build-time state, and (given
that we use -ffunction-sections) it won't appear in output binaries
unless called.
And there are use cases (e.g. z_smp_start_cpu()) where we need that
function even when BOOT_DELAY is enabled.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
z_smp_init() is only available if CONFIG_SMP is defined,
smp_timer_init() also depends on two Kconfig parameters. Also make it
conditional in cavs_timer.c. Also clarify some SMP-related comments
there.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
irq_enable() should be called with the composite IRQ code as its
argument, not just the Xtensa proper part of it.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This is another API that is being used in all timer drivers and is not
internal to the clock subsystem. Remove the leading z_ and make promote
it to a cross-subsystem API.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The clock/timer APIs are not application facing APIs, however, similar
to arch_ and a few other APIs they are available to implement drivers
and add support for new hardware and are documented and available to be
used outside of the clock/kernel subsystems.
Remove the leading z_ and provide them as clock_* APIs for someone
writing a new timer driver to use.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
There was a bunch of dead historical cruft floating around in the
arch/xtensa tree, left over from older code versions. It's time to do
a cleanup pass. This is entirely refactoring and size optimization,
no behavior changes on any in-tree devices should be present.
Among the more notable changes:
+ xtensa_context.h offered an elaborate API to deal with a stack frame
and context layout that we no longer use.
+ xtensa_rtos.h was entirely dead code
+ xtensa_timer.h was a parallel abstraction layer implementing in the
architecture layer what we're already doing in our timer driver.
+ The architecture thread structs (_callee_saved and _thread_arch)
aren't used by current code, and had dead fields that were removed.
Unfortunately for standards compliance and C++ compatibility it's
not possible to leave an empty struct here, so they have a single
byte field.
+ xtensa_api.h was really just some interrupt management inlines used
by irq.h, so fold that code into the outer header.
+ Remove the stale assembly offsets. This architecture doesn't use
that facility.
All told, more than a thousand lines have been removed. Not bad.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The count register is 64 bits, but we're a 32 bit CPU that can only
read four bytes at a time, so a bit of care is needed to prevent
racing against a wraparound of the low word. Wrap the low read
between two reads of the high word and make sure it didn't change.
Fixes#31599
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Replaces all existing variants of value clamping with the MIN and MAX
macros with the CLAMP macro.
Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
The HDA wall clock timer is a 64 bit timer with 64 bit compare
registers, but it's being used from a 32 bit CPU. Writing the
comparator piecewise with a 64 bit C assignment will write the low
dword first, opening the possibility that the hardware will see time
go "backwards" and trigger an interrupt incorrectly.
Disable the enable bit while setting the comparator.
Found by inspection. In practice this will be very rare, and spurious
timer interrupts are supposed to be benign anyway (though they can
result in timeout expirations being misaligned to ticks, which might
be surprising to applications). Best to get it right.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.
A coccinelle rule is used for this:
@r_const_dev_1
disable optional_qualifier
@
@@
-struct device *
+const struct device *
@r_const_dev_2
disable optional_qualifier
@
@@
-struct device * const
+const struct device *
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Replace various drivers and soc code that use DT_CAVS_ICTL_BASE_ADDR
with DT_REG_ADDR(DT_NODELABEL(cavs0)).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add a k_timeout_t type, and use it everywhere that kernel API
functions were accepting a millisecond timeout argument. Instead of
forcing milliseconds everywhere (which are often not integrally
representable as system ticks), do the conversion to ticks at the
point where the timeout is created. This avoids an extra unit
conversion in some application code, and allows us to express the
timeout in units other than milliseconds to achieve greater precision.
The existing K_MSEC() et. al. macros now return initializers for a
k_timeout_t.
The K_NO_WAIT and K_FOREVER constants have now become k_timeout_t
values, which means they cannot be operated on as integers.
Applications which have their own APIs that need to inspect these
vs. user-provided timeouts can now use a K_TIMEOUT_EQ() predicate to
test for equality.
Timer drivers, which receive an integer tick count in ther
z_clock_set_timeout() functions, now use the integer-valued
K_TICKS_FOREVER constant instead of K_FOREVER.
For the initial release, to preserve source compatibility, a
CONFIG_LEGACY_TIMEOUT_API kconfig is provided. When true, the
k_timeout_t will remain a compatible 32 bit value that will work with
any legacy Zephyr application.
Some subsystems present timeout (or timeout-like) values to their own
users as APIs that would re-use the kernel's own constants and
conventions. These will require some minor design work to adapt to
the new scheme (in most cases just using k_timeout_t directly in their
own API), and they have not been changed in this patch, instead
selecting CONFIG_LEGACY_TIMEOUT_API via kconfig. These subsystems
include: CAN Bus, the Microbit display driver, I2S, LoRa modem
drivers, the UART Async API, Video hardware drivers, the console
subsystem, and the network buffer abstraction.
k_sleep() now takes a k_timeout_t argument, with a k_msleep() variant
provided that works identically to the original API.
Most of the changes here are just type/configuration management and
documentation, but there are logic changes in mempool, where a loop
that used a timeout numerically has been reworked using a new
z_timeout_end_calc() predicate. Also in queue.c, a (when POLL was
enabled) a similar loop was needlessly used to try to retry the
k_poll() call after a spurious failure. But k_poll() does not fail
spuriously, so the loop was removed.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The DSP wall clock timer on some Intel SoC is a timer driven
directly by external oscillator and is external to the CPU
core(s). It is not as fast as the internal core clock, but
provides a common and synchronized counter for all CPU cores
(which is useful for SMP).
This uses the RISCV timer as base as it is using 64-bit
counter.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
