The variable needs to be an atomic_t, and in one case it was
being incremented outside of an atomic_inc/atomic_add.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Adding the ability to set and get pthread names by defining
some non-standard extension functions that were first
introduced by Glibc.
Similar to zephyr thread naming, these allow for thread
tracking and debugging even when using the more portable
posix API.
Though Glibc was the originator, the current POSIX functions
have return codes based on Oracle's adopted spec, so these
functions follow suit. The Oracle and Glibc function
prototypes match.
Signed-off-by: Nicholas Lowell <nlowell@lexmark.com>
This allows flash_img.c to be used outside of mcuboot scope.
Add new call to not break existing code.
Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
While CONFIG_ARCH_POSIX in general isn't compatible with Zephyr POSIX
subsys (because CONFIG_ARCH_POSIX itself is implemented on top of
POSIX, so there're obvious conflicts), apply workaround to allow to
at least use clock_gettime() and clock_settime() functions.
This change is grounded in upcoming support for date manipulation
commands for Zephyr shell, which are implemented using functions
above. There's no guarantee that CONFIG_ARCH_POSIX and Zephyr POSIX
subsys will coexist for any other usecase. (But the change is
relatively clean and is definitely in the right direction of
prototyping ways of such a coexistance.)
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
(cherry picked from commit 4a05644bce81f4792c018964d29c1158f1982d1e)
According to the Zephyr VS HCI specification:
Only Read_Version_Information and Read_Supported_Commands commands are
mandatory.
Check for supported Read Supported Features command before issuing this
command to the controller.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Add the Energy Scan capability to the possible capabilities list.
Create new energy scan callback function type to make its usage
more readable.
Signed-off-by: Marek Porwisz <marek.porwisz@nordicsemi.no>
According to LWM2M specification, when Queue Mode is used, the LWM2M
client should keep the reciever on for specified time after sending A
CoAP message. This commit adds a new LWM2M event,
`LWM2M_RD_CLIENT_EVENT_QUEUE_MODE_RX_OFF`, to facilitate the process by
notifying the application when it's safe to turn the receiver off.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
We now negotiate DNS servers in the IPCP configuration. This has been
observed to speed up the connection setup. The received DNS servers
are used by the DNS resolver library, but we leave it optional since
the static server list might be preferable.
Increase MAX_IPCP_OPTIONS to 4 so that we can nack all RFC 1877
options.
Signed-off-by: Göran Weinholt <goran.weinholt@endian.se>
arc mpu ver3 does not allow mpu region overlap, so need to enable
MPU_REQUIRES_NON_OVERLAPPING_REGIONS.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
In C++ designated initializers require that designators used in the
expression must appear in the same order as the data members.
In addition, 7-2018-q2-update version of g++ doesn't support
implicit member initialization, so all members must be
initialized.
Signed-off-by: Alexey Eremin <a.eremin.msu@gmail.com>
Change the doxygen doc from "negative on error" to -ENOSUP and
negative value on driver specific errors.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
sys/timeutil.h could not be used without including first
<zephyr/types.h> because s64_t type definition was missing.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Document the need for the caller to call bt_conn_unref on the
connection object returned from API functions.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Add zephyr execution regions(text, rodata, data, noinit, bss, etc.)
with proper attributes to translation tables.
Linker script has been modified a little to align these sections to
minimum translation granule(4 kB).
With this in place, code cannot be overwritten accidently as it is
marked read only. Similarly, execution is prohibited from data/RW
section as it is marked execute-never.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Add MMU support for ARMv8A. We support 4kB translation granule.
Regions to be mapped with specific attributes are required to be
at least 4kB aligned and can be provided through platform file(soc.c).
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Following changes are done:
- The vector table should be placed in text segment.
- Removed Vector relay table related entries as it is
only applicable to aarch32.
- irq_vector_table contains ISR pointers - should be placed
in rodata segment.
- put openocd_dbg in rodata and skip adding <linker_relocate.ld>
as CONFIG_CODE_DATA_RELOCATION is not defined for aarch64
currently (add later if needed).
Fixes: #22673
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
plt and got sections are used for dynamic linking which
is not supported in Zephyr.
Reference: #11953
commit 3ba7097e73 ("linker: add orphan sections to linker script")
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
We introduce a macro to define the IRQ priority level for
PendsV, and use it in arch/arm/include/aarch32/exc.h
to set the PendSV IRQ level. The commit does not change
the behavior of PendSV interrupt.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds some documentation for the exception
priority scheme for 32-bit ARM architecture variants.
In addition we document that SVCall priority level for
ARMv6-M is implicitly set to highest (by leaving it as
default).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Public arm/aarch32/exc.h header file is used by both
Cortex-M and Cortex-R; we update the header information
accordingly.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
If IO APIC is in logical destination mode, local APICs compare their
logical APIC ID defined in LDR (Logical Destination Register) with
the destination code sent with the interrupt to determine whether or not
to accept the incoming interrupt.
This patch programs LDR in xAPIC mode to support IO APIC logical mode.
The local APIC ID from local APIC ID register can't be used as the
'logical APIC ID' because LAPIC ID may not be consecutive numbers hence
it makes it impossible for LDR to encode 8 IDs within 8 bits.
This patch chooses 0 for BSP, and for APs, cpu_number which is the index
to x86_cpuboot[], which ultimately assigned in z_smp_init[].
Signed-off-by: Zide Chen <zide.chen@intel.com>
Document that all services that should be included in the initial
database hash should be registered before calling settings load. All
services added after settings_load will trigger a new hash calculation
and a new value stored. This would result in the database hash always
being rewritten.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
The Runtime API and the name processing API were omitted in
the documentation as were not included in any doxygen group.
This patch includes them in dedicated settings API doxygen
sub-groups.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
This is aligned with the documentation which states that an error shall
be returned if the work has been completed:
'-EINVAL Work item is being processed or has completed its work.'
Though in order to be able to resubmit from the handler itself it needs
to be able to distinct when the work is already completed so instead of
-EINVAL it return -EALREADY when the work is considered to be completed.
Fixes#22803
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This commit fixes the improper naming of the ROM sections.
1. Rename the first ROM section, which was previously named using the
`_TEXT_SECTION_NAME` definition, to `rom_start`, as this section does
not actually represent the text section.
2. Rename the second ROM section, which was previously named
`_TEXT_SECTION_NAME_2` which supposedly refers to the definition of
the same name that does not exist, to `_TEXT_SECTION_NAME`. Note that
this is indeed the section that contains the text section from the
source image.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit cleans up the linker.ld file for the Cortex-R arch.
* Convert all TAB characters to SPACE.
* Fix insane placement of curly brackets.
* Fix overall text alignments.
* Remove the special handlings for the Cortex-M devices that were
copied from `include/arm/aarch32/cortex_m/scripts/linker.ld`.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
GPIO_DIR_OUT is deprecated but allowed in devicetree bindings because
some in-tree bindings provided it in the past. GPIO_DIR_IN was the
former explicit way of representing the default direction. Put it
back so symmetry is maintained.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the special x86 operand modifier 'p' to print the raw value.
This fixes an issue on x86-64 where errors were generated
if a constant larger than INT_MAX was used.
Values larger than UINT_MAX are still unsupported (on any arch).
Fixes: #22542
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit relocates the `_vector_end` symbol that was previously
placed after the OpenOCD sections to before these sections, as the
OpenOCD debug sections are not part of the "vector table."
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit fixes the improper naming of the ROM sections.
1. Rename the first ROM section, which was previously named using the
`_TEXT_SECTION_NAME` definition, to `rom_start`, as this section does
not actually represent the text section.
2. Rename the second ROM section, which was previously named
`_TEXT_SECTION_NAME_2` which supposedly refers to the definition of
the same name that does not exist, to `_TEXT_SECTION_NAME`. Note that
this is indeed the section that contains the text section from the
source image.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit cleans-up the linker.ld file for the AArch64 arch.
* Convert all TAB characters to SPACE.
* Fix insane placement of curly brackets.
* Fix overall text alignments.
* Remove the special handlings for the Cortex-M devices that were
copied from `include/arm/aarch32/cortex_m/scripts/linker.ld`.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
A `k_timer` callback is called from the ISR context on certain devices
(nRF), which resulted in an assert in the kernel, as `telnet_send`, and
thus `net_context_send` used a mutex.
Fix the issue by replacing a timer used by the `shell_telnet` module
with a delayed work, which will execute it's callback in a system
workqueue context.
Fixes#22697
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Rename the scan recv callback info struct so that it reflects that it
is part of the scan recv callback. This will make it consistent with
future plans for advertising callbacks.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Fix the size of the evt_type, this lead to error over serialized HCI
where the event could not be interpreted correctly from the HCI
controller.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Log call was missing log_strdup wrap around thread name which
is a string in RAM.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Ordered struct init properties to match declaration order. Compiled
and ran on qemu emulator.
Fixes#22482
Signed-off-by: Glenn Engel <glenne@engel.org>
This commit fixes incorrect Cortex-R interrupt lock, unlock and state
check function implementations.
The issues can be summarised as follows:
1. The current implementation of 'z_arch_irq_lock' returns the value
of CPSR as the IRQ key and, since CPSR contains many other state
bits, this caused 'z_arch_irq_unlocked' to return false even when
IRQ is unlocked. This problem is fixed by isolating only the I-bit
of CPSR and returning this value as the IRQ key, such that it
returns a non-zero value when interrupt is disabled.
2. The current implementation of 'z_arch_irq_unlock' directly updates
the value of CPSR control field with the IRQ key and this can cause
other state bits in CPSR to be corrupted. This problem is fixed by
conditionally enabling interrupt using CPSIE instruction when the
value of IRQ key is a zero.
3. The current implementation of 'z_arch_is_in_isr' checks the value
of CPSR MODE field and returns true if its value is IRQ or FIQ.
While this does not normally cause an issue, the function can return
false when IRQ offloading is used because the offload function
executes in SVC mode. This problem is fixed by adding check for SVC
mode.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
If unistd.h is included while CONFIG_POSIX_API is not
defined, there is a mismatch of extern C braces that will
cause compile errors
Signed-off-by: Nicholas Lowell <nlowell@lexmark.com>
This commit removes the redundant text section offset specification in
the AArch64 linker script.
The text section offset is already specified by the
`text_section_offset.ld`, which is included by
`arch/common/CMakeLists.txt`.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The callee-saved registers have been separated out and will not
be saved/restored if exception debugging is shut off.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The syscall exception frame was stored on the CPU struct during
syscall execution, but that's not right. System calls might "feel
like" exceptions, but they're actually perfectly normal kernel mode
code and can be preempted and migrated between CPUs at any time.
Put the field on the thread struct.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Use of the _current_cpu pointer cannot be done safely in a preemptible
context. If a thread is preempted and migrates to another CPU, the
old CPU record will be wrong.
Add a validation assert to the expression that catches incorrect
usages, and fix up the spots where it was wrong (most important being
a few uses of _current outside of locks, and the arch_is_in_isr()
implementation).
Note that the resulting _current expression now requires locking and
is going to be somewhat slower. Longer term it's going to be better
to augment the arch API to allow SMP architectures to implement a
faster "get current thread pointer" action than this default.
Note also that this change means that "_current" is no longer
expressible as an lvalue (long ago, it was just a static variable), so
the places where it gets assigned now assign to _current_cpu->current
instead.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Other posix headers were already wrapped, this one seems
to have been missed so it can be compiled with C++
Signed-off-by: Nicholas Lowell <nlowell@lexmark.com>
The existing stack_analyze APIs had some problems:
1. Not properly namespaced
2. Accepted the stack object as a parameter, yet the stack object
does not contain the necessary information to get the associated
buffer region, the thread object is needed for this
3. Caused a crash on certain platforms that do not allow inspection
of unused stack space for the currently running thread
4. No user mode access
5. Separately passed in thread name
We deprecate these functions and add a new API
k_thread_stack_space_get() which addresses all of these issues.
A helper API log_stack_usage() also added which resembles
STACK_ANALYZE() in functionality.
Fixes: #17852
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
