Commit graph

2517 commits

Author SHA1 Message Date
Henrik Brix Andersen
eb9cf9e0dc soc: arm: nxp: kinetis: k2x: remove MPU support
Remove (disabled) MPU support for the NXP Kinetis K2x. At least the
MK22F51212, which is the only K2x supported by Zephyr so far, does not
contain an MPU.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-05-26 18:14:03 -05:00
Piotr Mienkowski
a323a41fc2 sensor: qdec_sam: use compatible atmel,sam-tc-qdec
Change the drivers's compatible from atmel,sam-tc to atmel,sam-tc-qdec.
The atmel,sam-tc should be reserved for the future counter driver.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2021-05-26 18:13:10 -05:00
Piotr Mienkowski
80ad300b6c dts: same70: use lower case letter in tc0 reg address
The change removes the following warning:
Warning: /soc/tc@4000C000: simple-bus unit address format error,
         expected "4000c000"

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2021-05-26 18:13:10 -05:00
Anas Nashif
dde1a2126f nios2: max10: fix uart0 base register
Fix register for uart0.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-05-26 18:09:47 -05:00
Arvin Farahmand
d1d494e2b7 drivers: flash: bugfix: set atmel SAM0 write-block-size
`write-block-size` property in multiple Atmel SAM SoCs was either
missing or set incorrectly.

Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
2021-05-25 11:59:45 -05:00
Martí Bolívar
b6fbc20de4 dts: add 'linaro,' prefix to 96b-lscon-1v8, 96b-lscon-3v3
These compatibles don't match the dt-schema regular expression for
compatible properties that we'd like to support in Zephyr because they
do not begin with a letter.

Use linaro, as a vendor prefix to make them compliant. Update the
release notes since out of tree users will need to keep up.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-05-19 22:18:25 -05:00
Simon Guinot
1adbe8b65f dts: bindings: fix label properties for gpio-leds node
This patch adds a label property to the GPIO LED parent node and fixes
the label property description of the child node. Indeed it is the label
of a parent node which can be used as device_get_binding() parameter to
retrieve the LED device, and not the one of a child node.

In addition, this patch sets both this properties as not required
because they are not.

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2021-05-19 11:56:01 +02:00
Simon Guinot
0530ece6b8 dts: bindings: fix label properties for pwm-leds node
This patch adds a label property to the PWM LED parent node and fixes
the label property description of the child node. Indeed it is the label
of a parent node which can be used as device_get_binding() parameter to
retrieve the LED device, and not the one of a child node.

Fixes #34275

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2021-05-19 11:56:01 +02:00
Rico Ganahl
925303ede6 dts: stm32mp1: SPI2 mixup with SAI2, SPI3 mixup with SAI3
Device Tree address mixup between
SAI2 <-> SPI2 and SAI3 <-> SPI3

Add functionality to SPI2/3
Tested on SPI2

Signed-off-by: Rico Ganahl <rico.ganahl@bytesatwork.ch>
2021-05-18 11:19:30 -05:00
Aurelien Jarno
869d252942 dts: arm: stm32f{2,4,7}: fix device tree warning
Switch the interrupt controller address to lower case to avoid this
warning:

  stm32f723e_disco.dts.pre.tmp:97.39-102.5: Warning (simple_bus_reg):
  /soc/interrupt-controller@40013C00: simple-bus unit address format
  error, expected "40013c00"

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2021-05-17 09:52:27 -05:00
Tim Lin
f66cb34b13 dts: riscv: it8xxx2: fix default status of UART
The default status of UART should set disabled.
If UART needs to enable, it will be set in the
dts of board level.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-05-12 13:01:56 -05:00
Andrzej Głąbek
797aa8b85a soc: nrf9160: Remove incorrect indication of SWO availability
Serial Wire Output functionality is not implemented in nRF9160.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-05-11 13:00:20 -05:00
Eug Krashtan
05d798e3a9 drivers: sensor: STM32 die temperature driver
STM32 internal temperature sensor driver.
This sensor can be used to measure the temperature of the CPU
and its surroundings.

Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
2021-05-08 10:18:09 -05:00
Saurabh Jagdhane
eb205ebe68 boards: arm: Enable FlexSPI driver on mimxrt685_evk.
Enable FlexSPI NOR flash driver with XIP build options.
Configure FlexSPI pins, update board documentation.
Add FlexSPI NOR flash dts node for mimxrt685_evk.

Enable flash storage by adding partition to dts file.
Using last 1MB for storage, and reserving 63MB for code.

Signed-off-by: Saurabh Jagdhane <saurabh.jagdhane@nxp.com>
2021-05-07 15:44:19 -05:00
Eug Krashtan
793e2c1891 drivers: flash: at45: Add Reset and WP pins
Adding Reset and Write-protect pins initialization during AT45 driver
start-up. Usually these pins are driven high when not used.
The AT45 device incorporates an internal power-on reset circuit, so
there is no initial on-off reset sequence.

Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
2021-05-07 14:57:08 -05:00
Alexander Wachter
94f85241aa dts: arm: stm32g4: add can bindings to stm32g4 SoCs
This commit adds the CAN nodes to the STM32g4 SoCs.

Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
2021-05-07 12:36:10 -05:00
Alexander Wachter
f1754b19eb drivers: can: Implement stm32fd driver
This driver is the SoC specific implementation of the
Bosch M_CAN IP.

Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
2021-05-07 12:36:10 -05:00
Alexander Wachter
1c50ef6c43 drivers: can: Implement Bosch M_CAN driver
Implementation of the Bosch M_CAN IP driver.
This driver is just the base for a specific SoC implementation.

Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
2021-05-07 12:36:10 -05:00
U Divya
86fa606a0c drivers: gpio: Add GPIO driver for Intel Elkhart Lake
Added support for GPIO driver for Intel Elkhart Lake
board.
The GPIO driver will support pin value read/write operations,
pin direction and interrupt configuration. ACPI enumeration
support and support for different GPIO communities is also
present.

Verified on ehl_crb.

Signed-off-by: U Divya <u.divya@intel.com>
2021-05-07 09:45:50 -04:00
U Divya
f6436a14d8 drivers: gpio: Generic GPIO driver for Intel SoC
Modified GPIO driver for Intel APL SoC to have a
generic driver for all Intel SoC.

Signed-off-by: U Divya <u.divya@intel.com>
2021-05-07 09:45:50 -04:00
Tomasz Michalec
d83647dea6 drivers: adc: add ADC emulator
ADC emulator is designed to be used in tests on native_posix board. It
supports 1-16 bit resolution range and all GAINs from enum adc_gain.
Reference voltages and number of emulated channels are set through dts.
Using special API from drivers/adc/adc_emul.h it is possible to set
constant voltage value returned by given ADC channel or set custom
function which allows to simulate complex output.
Also reference voltages can be changed in runtime using the API.

The CL also includes:
- Add adc definitions of ADC emulator in
  tests/drivers/adc/adc_api/src/test_adc.c for supporting test suites.
- Add test for ADC emulator API in tests/drivers/adc/adc_emul/

Signed-off-by: Tomasz Michalec <tm@semihalf.com>
2021-05-07 15:27:37 +02:00
Hake Huang
b336579cbb dts: add edma related in dts bindings
add dts bingings for dma usage
add dts support for adc with edma and hwtrigger
add a periodic_trigger feature to dts

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-05-07 08:23:49 -05:00
MORGER Patrick
0e1d16bf03 drivers: sensors: smart-battery with SBS 1.1 compliant fuel gauge
Implementation of a SBS 1.1 compliant fuel gauge driver

Signed-off-by: MORGER Patrick <patrick.morger@leica-geosystems.com>
2021-05-07 07:55:23 -05:00
Aymeric Aillet
8eed20db0c dts: arm: rcar_gen3_cr7: Add SCIF support to DTS
Add SCIF bus initial support to Renesas R-Car SOC series.
SCIF1 is used as main serial and shell output on R-Car H3 board.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-05-07 13:08:48 +02:00
Aymeric Aillet
9a90dffc3c dts: bindings: serial: add Renesas R-Car SCIF
Renesas has Serial Communication Interface with
FIFO (SCIF) hardware block which allow asynchronous and
synchronous serial communication. The SCIF has 16-stage FIFO
buffers separately for transmissions and reception.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-05-07 13:08:48 +02:00
Martí Bolívar
6b15ad1fd5 dts: nrf52811: fix indendation in dtsi
Commit 233149eec5 moved flash sram nodes
under /soc for various nordic ICs, but the indentation isn't right for
52811. Fix it.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-05-07 09:27:21 +02:00
Marcin Niestroj
b4854debd1 drivers: wifi: esp_at: rename driver from esp
Recently WiFi ESP32 driver (utilizing WiFi radio in ESP32 SoC) was
introduced into drivers/wifi/esp32/ and it already caused confusion as
there was existing drivers/wifi/esp/ directory for ESP-AT
driver (utilizing external WiFi chip, by communicating using AT commands
from any serial capable platform). So question has arisen whether it is
good to merge both, while they are totally different drivers.

Rename ESP-AT driver to be placed in drivers/wifi/esp_at/, so that it is
easier to figure out difference between "esp32" and "esp_at" just by
looking at driver name. Rename also DT compatible and all Kconfig
options for the same reason.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2021-05-06 13:21:39 -04:00
Kieran Mackey
38ed9c885e drivers: dac: added driver for Microchip MCP4725
The MCP4725 is a single channel 12 bit DAC. It is controlled via I2C.

Signed-off-by: Kieran Mackey <kieran.mackey@lairdconnect.com>
2021-05-06 11:07:33 -05:00
Emil Lindqvist
f3f8af4cc2 drivers: modem: ublox-sara-r4: make reset pin optional
Remove reset pin requirement from devicetree as this
is not required for modem functionality, and is not
used in the driver anyways.

Signed-off-by: Emil Lindqvist <emil@lindq.gr>
2021-05-06 09:44:19 -05:00
Thomas Stranger
0baa7d63b1 dts: stm32g4: fix dmamux number of dmamux request inputs
For dmamux nodes the dma-requests property specifies the number of
peripheral request inputs(not nr. of request trigger inputs).
This commit fixes this for g4 series.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-05-06 09:28:33 -05:00
Gerson Fernando Budke
d999531f7f drivers: spi: Add cypress PSoC-6 scb spi driver
Add Cypress PSoC-6 SCB[spi] driver.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-05-05 16:01:28 +02:00
Gerson Fernando Budke
3155b762a6 dts: spi: Add cypress PSoC-6 controller
Add Cypress PSoC-6 SPI controller and pinctrl nodes.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-05-05 16:01:28 +02:00
Matija Tudan
d2c503f202 sensor: add MAX17262 fuel gauge driver and sample application
The MAX17262 is an ultra-low power fuel-gauge IC which implements the
Maxim ModelGauge m5 algorithm. The IC monitors a single-cell battery
pack and supports internal current sensing for up to 3.1A pulse
current. The IC provides best performance for batteries with 100mAhr
to 6Ahr capacity.

Signed-off-by: Matija Tudan <mtudan@mobilisis.hr>
2021-05-05 15:54:29 +02:00
Tim Lin
caa3328cc7 ite: drivers/pinmux: modify pinmux driver
Modify the pinmux control method and add support the fun3
& fun4 alternation function.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-05-05 08:45:16 -04:00
Francois Ramu
3a93f9bcc9 dts: arm: stm32l1 has a fixed lsi clock of 37kHz
Correct the clock freq of the lsi for the stm32l1

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-05-05 08:42:21 -04:00
Erwan Gouriou
39a58dd6e6 dts/arm/st: h7: Fix pll2 reg address
reg value should match value provided within node name (as in pll@2).
Fix this to avoid warning.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-05-04 13:57:41 -05:00
Kumar Gala
d8299e3a5a dts: bindings: nxp: Add pinctrl-0 as a required property
Add pinctrl-0 as being required on NXP Kinetis DTS bindings for I2C,
FTM, UART, and DSPI related devices.

Other devices like ethernet and CAN are utilized outside of just the
Kinetis family and thus we can not require pinctrl-0 property for them
at this time.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-05-04 13:03:00 -05:00
Kumar Gala
241f208db6 dts: arm: nxp_kw2xd: Add SPI0 sip pins
As the KW2XD is a SiP (System-in-package) the SPI1 controller on the MCU
is connected to the modem.  As the pinctrl details for this in the
SoC dtsi file as these pins are not exposed in the pindata XMLs from
NXP.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-05-04 13:03:00 -05:00
Kumar Gala
b118dae7b2 dts: nxp: default SPI0 to being disabled
Set SPI0 controller to default to being disabled in SoC dtsi files and
having the board dtsi files enable it.  The only board that wasn't doing
this already was the frdm_kw41z.dts.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-05-04 13:03:00 -05:00
Erwan Gouriou
fc9e72c528 dts/bindings: clocks: Fix stm32f105 pll mul range
PLL mul could be set up to 9.
Fix this.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-05-04 13:02:26 -05:00
Erwan Gouriou
a77b2b8d73 dts/arm/st: f1: Use stm32f100 specific binding for pll
stm32f100 devices have a specific pll.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-05-04 13:02:26 -05:00
Erwan Gouriou
c19c1cc961 dts/bindings: clocks: Add binding for stm32f100 pll
Add specific binding for stm32f100 pll which differs from existing
stm32f1 and stm32f105 specific pll binding.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-05-04 13:02:26 -05:00
Arvin Farahmand
a687610b80 drivers: uart_sam0: add support for collision detection error
Automatic collision detection for half-duplex mode can be enabled
by setting `collision-detection` proprety for uart hardware
in the dts file. If the transmitted bit does not match the received
bit an error is raised. This is useful in RS-485 half-duplex mode.

Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
2021-05-03 19:57:07 -04:00
Erwan Gouriou
434be55845 dts/arm/st: h7: Add clocks nodes
Add clock nodes for stm32h7 devices.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-05-03 10:56:05 +02:00
Erwan Gouriou
28c3cfacfe dts/bindings: clocks: Add clocks bindings for stm32h7 series
Add clocks related stm32h7 specific bindings:
- stm32h7-hsi-clock
- stm32h7-pll-clock
- stm32h7-rcc

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-05-03 10:56:05 +02:00
Mahesh Mahadevan
5fa4876d2b dts: Add support for I2S driver for LPC devices
Add support for I2S driver for LPC devices

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-04-30 12:02:55 -05:00
Francois Ramu
2493c39ee7 dts: arm: stm32h723 has usart10 in its dts
adding the device node for UART10 in dts/arm/st/h7/stm32h723.dtsi

Signed-off-by: Kshitij Kumar <kshitij9192@gmail.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-04-29 17:06:01 -05:00
Dino Li
ee39291553 dts: it8xxx2: change flash size to 1M byte
Flash size of IT8xxx2 is 1M byte.

Change-Id: Ic1464b6e36f16291f14024a6fb49acbf3a243176
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2021-04-29 16:47:47 -05:00
Erwan Gouriou
5d2909654f dts/arm: st: Add clocks node on stm32wl series
Add clocks on stm32wl.dtsi.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 16:41:26 +02:00
Erwan Gouriou
4978e2032f dts/bindings: clocks: Add stm32wl-rcc and fix stm32wb-pll-clock
Add binding fro stm32wl-rcc.yaml that derivates from stm32wb-rcc.
Additionally update stm32wb-pll-clock.yaml to be used as well
for stm32wl series and add missing div-m property.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 16:41:26 +02:00