soc: arm: nxp: kinetis: k2x: remove MPU support
Remove (disabled) MPU support for the NXP Kinetis K2x. At least the MK22F51212, which is the only K2x supported by Zephyr so far, does not contain an MPU. Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
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3 changed files with 0 additions and 28 deletions
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@ -52,13 +52,6 @@
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};
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soc {
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mpu: mpu@4000d000 {
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compatible = "nxp,k22f-mpu";
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reg = <0x4000d000 0x824>;
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status = "disabled";
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};
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mcg: clock-controller@40064000 {
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compatible = "nxp,kinetis-mcg";
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reg = <0x40064000 0xd>;
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@ -13,7 +13,6 @@ config SOC_SERIES_KINETIS_K2X
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select CPU_CORTEX_M4
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select CPU_CORTEX_M_HAS_DWT
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select SOC_FAMILY_KINETIS
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select CPU_HAS_NXP_MPU
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select CLOCK_CONTROL
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help
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Enable support for Kinetis K2x MCU series
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@ -123,11 +123,6 @@ static int fsl_frdm_k22f_init(const struct device *arg)
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ARG_UNUSED(arg);
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unsigned int oldLevel; /* old interrupt lock level */
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#if !defined(CONFIG_ARM_MPU)
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#if defined(SYSMPU)
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uint32_t temp_reg;
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#endif
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#endif /* !CONFIG_ARM_MPU */
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/* disable interrupts */
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oldLevel = irq_lock();
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@ -135,21 +130,6 @@ static int fsl_frdm_k22f_init(const struct device *arg)
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/* release I/O power hold to allow normal run state */
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PMC->REGSC |= PMC_REGSC_ACKISO_MASK;
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#if !defined(CONFIG_ARM_MPU)
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/*
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* Disable memory protection and clear slave port errors.
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* Note that the K22F does not implement the optional ARMv7-M memory
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* protection unit (MPU), specified by the architecture (PMSAv7), in the
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* Cortex-M4 core. Instead, the processor includes its own MPU module.
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*/
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#if defined(SYSMPU)
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temp_reg = SYSMPU->CESR;
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temp_reg &= ~SYSMPU_CESR_VLD_MASK;
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temp_reg |= SYSMPU_CESR_SPERR_MASK;
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SYSMPU->CESR = temp_reg;
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#endif
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#endif /* !CONFIG_ARM_MPU */
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/* Initialize PLL/system clock to 120 MHz */
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clock_init();
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