Commit graph

45391 commits

Author SHA1 Message Date
Maciej Perkowski
060e00d9c5 sanitycheck: Add checking of zephyr version
Adds function checking the version of zephyr, used for reporting

Signed-off-by: Maciej Perkowski <Maciej.Perkowski@nordicsemi.no>
2020-10-26 14:19:34 -04:00
Maciej Perkowski
725d19b79e sanitycheck: Add info about zephyr version to the xml reports
This commit adds posibility to save zephyr version in the xml reports.
It adds 'properties' attribute to testsuite attribute. 'properties'
can contain multiple 'property' attributes. Zephyr version is added
as such 'property'.

Signed-off-by: Maciej Perkowski <Maciej.Perkowski@nordicsemi.no>
2020-10-26 14:19:34 -04:00
Vinayak Kariappa Chettimada
b3c9565891 Bluetooth: controller: Remove redundant condition compile
Remove a redundant condition compile.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2020-10-26 17:40:08 +01:00
Vinayak Kariappa Chettimada
c74438cdfa Bluetooth: controller: Fix arguments unused without Extended Scanning
Fix arguments unused when not enabling Extended Scanning
which was introduced in
commit 0cef1e43c9 ("Bluetooth: controller: Extended
Scanning Coded PHY duration and period").

Fixes #29442.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2020-10-26 17:40:08 +01:00
Steve Winslow
4143d79498 samples: smp: pi: Fix path in build instructions
This fixes the documentation instructions for building the SMP Pi
sample program, which incorrectly listed an underscore instead of
a path separator slash.

Signed-off-by: Steve Winslow <steve@swinslow.net>
2020-10-26 17:25:37 +01:00
Jukka Rissanen
c0d636aedf samples: net: echo-server: Set handler thread name
It is useful to see the name of the handler thread for debugging
purposes so set it when starting the handler thread.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-10-26 11:03:03 -05:00
Jukka Rissanen
a1b0a98fbf net: context: Add locking to IPv6, CAN and packet socket bind
The commit 93e5181f ("net: context: Add locking for concurrent
access") added net_context locking to only IPv4 sockets.
That is not enough and we need locking also to other supported
socket address families like IPv6, SocketCAN and packet socket.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2020-10-26 11:03:03 -05:00
Kumar Gala
1928428f19 ci: Add some disk usage reporting
Add some disk reporting to try and help debug random failures due to
disk space being used up.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-26 10:24:13 -05:00
Robert Lubos
7cfc612de7 CODEOWNERS: Add entries for CoAP, LwM2M and MQTT headers
Add myself as a reviewer for the aforementioned headers.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2020-10-26 15:42:05 +01:00
Joakim Andersson
999a91e30d Bluetooth: host: Fix application conn param update not started
Fix application conn param update submitted before the timeout of
CONFIG_BT_CONN_PARAM_UPDATE has expired being ignored when
CONFIG_BT_GAP_AUTO_UPDATE_CONN_PARAMS=n.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2020-10-26 16:16:35 +02:00
Joakim Andersson
21b8e08caa Bluetooth: host: Rename update_work to deferred_work
Rename the update_work handler to deferred_work since this handler
is being multiplexed for different kinds of deferred work, not just
updating the connection parameters.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2020-10-26 16:16:35 +02:00
Joakim Andersson
77b11d6b0c Bluetooth: host: Move auto-initiation of peripheral conn param update
Move auto-initiation of the peripheral connection parameter update,
this handling would only submit the delayed work with the timeout once
all other auto initiated procedures had completed. This behavior means
that the delay would not be set on when the connection was established
but instead relative to the previous procedures.
Based on the connection interval used, the instant(s) used, and the
number of auto procedures this delay becomes indeterminate.

Submit the work once connected, the constraint that existed in the
zephyr link layer earlier about requesting only one control procedure
at a time has been removed.

This also brings all the handling of the timeout work to the connection
state handling, which makes it easier to track this behavior in code.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2020-10-26 16:16:35 +02:00
Joakim Andersson
f4888b1ff6 Bluetooth: host: Allow conn param update delay of 0 milliseconds
Allow the application to set a conn param update delay of
0 milliseconds.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2020-10-26 16:16:35 +02:00
Joakim Andersson
f2a23ee166 Bluetooth: host: Document peripheral bt_conn_le_conn_update behavior
Document the behavior of the bt_conn_le_conn_update API when the
local device is the peripheral role.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2020-10-26 16:16:35 +02:00
Cassini Zhuang
3d3119b1e7 drivers/i2c: i2c_gpio:init at POST_KERNEL
This is to make the gpio-i2c initialization occur after the GPIO pin
clock initialization.

Signed-off-by: Cassini Zhuang <cassini.zhuang@hansonggroup.com>
2020-10-26 09:01:09 -04:00
Andrew Boie
5e18b5512b tests: mem_protect: rewrite memory domain tests
This suite now uses far less memory and is much simpler.
We still maintain coverage of all the memory domain APIs
and ensure that the maximum number of partitions can be
applied.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 08:58:00 -04:00
Andrew Boie
e26f21c96c tests: mem_protect: merge two duplicate tests
The tests test_mem_part_auto_determ_size and
test_mem_part_auto_determ_size_per_mpu are supposed to
just be checking the construction of automatic memory
partitions.

test_mem_part_auto_determ_size had a bunch of extraneous
stuff covered by other test cases and reserved three
different thread stacks.

These two tests have been drastically simplified and
combined.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 08:58:00 -04:00
Andrew Boie
54aa0f0c81 tests: mem_protect: delete duplicate test
test_mem_part_inherity_by_child_thr duplicates logic already
present in test_permission_inheritance. That test puts a
buffer called 'inherit_buf' in 'inherit_memory_partition'
and shows that it is accessible by a child thread by
writing to it.

Delete this unnecessary test.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 08:58:00 -04:00
Andrew Boie
ae69f87fac tests: mem_protect: improve main.c organization
Tests are now grouped in the C file they occur in.

test_mark_thread_exit_uninitialized no longer occurs twice.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 08:58:00 -04:00
Andrew Boie
4ae0f9b867 tests: mem_protect: update bss vars test
ztest_mem_partition is fine for this test. We can also run it
in user mode.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 08:58:00 -04:00
Andrew Boie
8022aabbe8 tests: mem_protect: move partition tests
Some tests only evaluate characteristics of k_mem_partitions.
Move these to a separate C file.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 08:58:00 -04:00
Andrew Boie
44ca58181a tests: mem_protect: static scope globals
put all globals only used in this C file in static scope, which
revealed that a few of them were not used at all.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 08:58:00 -04:00
Andrew Boie
cdbf3aa27d tests: x86: pagetables: fix non-KPTI case
If KPTI is not enabled, then the US bit will be set for all
the default memory partitions in the _app_smem section.

The error printed when a mismatch occurs now shows the
expected flags.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 08:56:47 -04:00
Martin Jäger
ba9fd65a4b doc: kernel: interrupts: zero-latency IRQ update
Add description how to enable zero-latency interrupt in the application
code. Previous docs described only the Kconfig and not the flag.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-10-26 13:15:20 +01:00
Andrew Boie
4d6bc47ac3 kernel: improve k_thread_user_mode_enter() docs
Note the stack and TLS wipe when this function runs.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 13:06:16 +01:00
Andrew Boie
0e30c6a0fa kernel: wipe TLS when dropping to user mode
For threads that run in supervisor mode for some time before
synchronously dropping to user mode, re-initialize the TLS
area to prevent leakage of potentially sensitive information.

We did this already for CONFIG_THREAD_USERSPACE_LOCAL_DATA
but not the new CONFIG_THREAD_LOCAL_STORAGE.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 13:06:16 +01:00
Andrew Boie
5c5e3597c8 tests: userspace: reduce memory domains to one
We now just use two memory domains; the default domain and an
'alternate_domain' used for tests that need to handle a memory
domain switch.

Along the way the test code was simplified.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 13:01:29 +01:00
Parthiban Nallathambi
88034a9dad ethernet: w5500: remove comparing uint64, int64
z_tick_get returns signed int. Adapt comparision
statement for remaining time computation.

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-10-26 07:35:46 -04:00
Parthiban Nallathambi
9a581642d1 ethernet: w5500: use bit fielding number for mode
bit field access with WRITE_BIT needs bit number, not the
value after BIT(mr).

Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
2020-10-26 07:35:46 -04:00
Andrew Boie
5376d44df7 Revert "samples: shared_mem: exclude qemu_x86_64"
This reverts commit d55a09ff05.

This is no longer necessary. The linked issue is closed.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 12:14:12 +01:00
Andrew Boie
7e9b136aa9 samples: shared_mem: re-use default memory domain
Saves quite a bit of memory on MMU-based systems which manage
page tables at the memory domain level.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 12:14:12 +01:00
Andrew Boie
449278c779 samples: shared_mem: rename domain structures
Names like dom0, dom1, part0, part1, etc., don't tell us
much of anything.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 12:14:12 +01:00
Andrew Boie
495f1cffd5 samples: prod_consumer: re-use default mem domain
Memory domains can be very expensive to instantiate. Demonstrate
how the default memory domain can be re-purposed for an
application, much like how the main thread already is.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-26 12:14:12 +01:00
Benjamin Lindqvist
660ad9791b net: lwm2m: Pack TLV integers more efficiently
Prior to this commit, the LwM2M stack would TLV-encode integers
depending on their internal storage size. An integer with value 5 stored
in an int8_t would be encoded with length 1, but an integer stored in an
int32_t would be encoded as "00 00 00 05" with length 4.

This commit checks if the value is castable to a smaller int and encodes
it as such if so. This is cascading, so even a 64 bit integer with value
5 will be encoded with length 1.

Note that this does not seem to be required by the specification, but
this is how Anjay and the other LwM2M stack seem to do it.

Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
2020-10-26 11:31:28 +02:00
Daniel Leung
3c79b565fe doc: add info about using thread local storage
Adds a simple document on thread local storage.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
e95d14ae9b tests: posix/{common,fs}: enable testing TLS
Enable additional test cases for thread local storage,
as these tests use errno.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
d963bda4c2 tests: kernel/common: enable testing TLS
This enables testing of thread local storage as this tests
errno.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
62cf1960ad kernel: support using thread local storage for errno
This enables storing errno in the thread local storage area.
With this enabled, a syscall to access errno can be avoided
when userspace is also enabled.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
2c8625ea7e xtensa: remove errno_var from strcut _thread_arch
The errno_var copy in Xtensa's struct is not being used at all
for errno (as there is already one in struct k_thread).
So remove it.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
c7ed7e492b xtensa: intel_s1000: enable thread local storage
Adds the bits to enable thread local storage for
intel_s1000 SoC.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
f8a909dad1 xtensa: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Note that this does not enable TLS for all Xtensa SoC.
This is because Xtensa SoCs are highly configurable
so that each SoC can be considered a whole architecture.
So TLS needs to be enabled on the SoC level, instead of
at the arch level.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
8a79ce1428 riscv: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
388725870f arm: cortex_m: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Note that since Cortex-M does not have the thread ID or
process ID register needed to store TLS pointer at runtime
for toolchain to access thread data, a global variable is
used instead.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
778c996831 arm: cortex_r: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
df77e2af8b arm64: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
4b38392ded x86: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
53ac1ee6fa x86_64: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
55c3fb3ff1 tests: add a simple test for thread local storage
This adds a simple test to make sure TLS works.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
02b20351cd kernel: add common bits to support TLS
This adds the common struct fields and functions to support
the implementation of thread local storage in individual
architecture. This uses the thread stack to store TLS data.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
3180fc0ecc linker: add linker sections for thread local storage
This adds the tdata and tbss sections required for thread local
storage. They are in ROM area as these sections are not to be
directly accessed, but copied to thread local storage area at
thread creation.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00