Apply same scheme for all nucleo_64 pins boards:
-provide a separate arduino connector dtsi file
-provide complete gpio map
-update board.yaml vs arduino support (i2c, spi and gpio)
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix CAN loopback mode in the NXP MCUX FlexCAN driver by only disabling
self-reception when loopback mode was not requested.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Try to figure out where the ping reply should be sent if there
are multiple network interfaces in the system.
Fixes#19612
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
As it is possible that hci_acl_handle generates an overflow hci event,
the high priority thread must be able to processed it.
Signed-off-by: Morten Priess <mtpr@oticon.com>
Stops leaking very long source paths in build directories; makes them
deterministic.
Besides satisfying a CMake requirement, the new empty_file.c provide a
clue that the actual test code is not in the directory of the test case.
See https://github.com/zephyrproject-rtos/hal_nordic/pull/6 and
https://gitlab.kitware.com/cmake/cmake/issues/19475 for more details.
- Test with a simple:
sanitycheck -T $ZEPHYR_BASE/tests/subsys/settings/functional/
- Before:
CMakeFiles
├── app.dir
│ ├── HOME
│ │ └── JOHN
│ │ └── zephyrproject
│ │ └── zephyr
│ │ └── tests
│ │ └── subsys
│ │ └── settings
│ │ └── functional
│ │ └── src
│ │ └── settings_basic_test.c.obj
- After:
func_test_bindir/
├── CMakeFiles
│ └── settings_func_test.dir
│ └── settings_basic_test.c.obj
│
├── libsettings_func_test.a
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
This was a very early test and got bitrotten inside a esp32-only
whitelist. Make it run generically.
SMP must be forced off by the test (it's commonly a platform default).
Add a build-time failure when the configuration is single-CPU, for
clarity.
Filter the test likewise so it runs on all supported systems.
Also, the key argument to the CPU startup function is vestigial and
the test was being too strict by requiring it to be non-zero.
Finally, the qemu command line needs to predicate the "-smp" argument
on CONFIG_MP_NUM_CPUS and not just CONFIG_SMP so we have an extra CPU
to test against.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This test was written very early. Spinlocks are required for SMP
implementation. They couldn't be tested in terms of it, so the test
used the low level MP API instead. But of course that breaks if SMP
is actually working and the CPU is already started.
No need for that now. Just spawn a thread like any other, and filter
the test to run only on SMP systems.
Fixes#19319
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Executing the ARM thread swap test with NO_OPTIMIZATIONS
option set, leads to Idle thread stack overflow in certain
platforms. We increase the size of the Idle thread stack to
address this.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Instead of printk(), use logging macros so that all the output
from IP stack and sample is nicely interleaved.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Network shell is useful to have in order to debug things so
enabling it for this sample application.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
The MQTT transport API functions are already documented in
mqtt_transport.h so need to duplicate them in individual
transport .c file.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Set STACK_ALIGN and STACK_ALIGN_SIZE to 8 bytes instead of 4 bytes in
case a 64-bit posix board is used.
Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
Add soc and dts files to support for most of the common peripherals
in the STM32G4 series. Add specific support for the STM32G431RB.
Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
A loop in k_mem_pool_alloc() around z_sys_mem_pool_block_alloc() assumes
the later may return -EAGAIN with an elaborate comment about it. But
-EAGAIN is no longer returned by that function since commit 7845e1b01e
("lib/mempool: Fix spurious -ENOMEM due to agressive latency control").
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
This patch is a preparatory step in enabling the MMU in
long mode; no steps are taken to implement long mode support.
We introduce struct x86_page_tables, which represents the
top-level data structure for page tables:
- For 32-bit, this will contain a four-entry page directory
pointer table (PDPT)
- For 64-bit, this will (eventually) contain a page map level 4
table (PML4)
In either case, this pointer value is what gets programmed into
CR3 to activate a set of page tables. There are extra bits in
CR3 to set for long mode, we'll get around to that later.
This abstraction will allow us to use the same APIs that work
with page tables in either mode, rather than hard-coding that
the top level data structure is a PDPT.
z_x86_mmu_validate() has been re-written to make it easier to
add another level of paging for long mode, to support 2MB
PDPT entries, and correctly validate regions which span PDPTE
entries.
Some MMU-related APIs moved out of 32-bit x86's arch.h into
mmustructs.h.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
SMP had API-level docs, but no architecture-level description.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>