Commit graph

1385 commits

Author SHA1 Message Date
Anas Nashif
f16f6ec2df tests: pipe: remove unsupported tests
Remove tests that assert due to invocation from ISR which is not supported.

Change-Id: Idd2360847a467af6afdd9fbed8f87a620d9ed2f7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-10 23:03:58 -08:00
Anas Nashif
bab5534ff6 tests: memory pool: remove unsupported tests
Change-Id: I467e9feb995db22b137038422aea9e1976166fc4
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-10 23:03:55 -08:00
Anas Nashif
c5e000b2c8 tests: xip: pulpino does not support XIP
Change-Id: I806c3b4cc218d501285174249f173e59e748bea7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-11 07:00:41 +00:00
Andrew Boie
122467e9ee tests: add test for gen_isr_table
This test is intended to verify that the SW ISR and vector tables
have been populated correctly.

Change-Id: Ic7f50c02dc0807d7ddefa710da67f818ff707ad6
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-11 01:28:00 +00:00
Andrew Boie
e7acd3224c arm: use gen_isr_tables mechanism for interrupts
This replaces the hard-coded vector table, as well as the
software ISR table created by the linker. Now both are generated
in build via script.

Issue: ZEP-1038, ZEP-1165
Change-Id: Ie6faaf8f7ea3a7a25ecb542f6cf7740836ad7da3
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-11 01:27:58 +00:00
Jithu Joseph
720400372b misc: fix more variable type mismatches
These were reported by ISSM compiler.

Jira: ZEP-1179

Change-Id: Ic625749309773611c0c6ba2905e9420e98947dae
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
2017-02-11 00:14:15 +00:00
Luiz Augusto von Dentz
f7100f8092 tests/common: Add tests for sys_dlist_*
Change-Id: I95fbaf902968b71ce42fd6d04a10c41a0be4ff03
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2017-02-10 16:16:14 +00:00
Luiz Augusto von Dentz
2970771bbe tests/slist: Exercise CONTAINER macros
Change-Id: I8439febd605c50ee829f16bc68c53c7d5aebd5d2
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2017-02-10 16:16:13 +00:00
Benjamin Walsh
acece24eac tests/kernel/poll: verify .signaled is set correctly
Change-Id: I19b39d09c198ef7fee7d92d2d5847bd064057b61
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
2017-02-09 23:54:27 +00:00
Benjamin Walsh
5bbd683b9b test/kernel/poll: fix putting wrong .signaled to 0
Change-Id: I7d7255fe85857ad3edb10070b585a6694d1d4b0b
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
2017-02-09 23:54:26 +00:00
jing wang
4e5fa0ede2 tests: add systhreads test case
this commit check the priority of 2 system threads - main and idle

Change-Id: Ie57e7fdab3d15c0b69d85ed6282bfa6aa04133b4
Signed-off-by: jing wang <jing.j.wang@intel.com>
2017-02-08 13:22:49 +00:00
Sharron LIU
de7435a73f tests: kernel: mem_heap: added api and concept tests
<kernel.h> APIs covered:
    k_malloc
    k_free
Concept TESTPOINTs extracted from
https://www.zephyrproject.org/doc/kernel/memory/heap.html#concepts

ZEP-1242

Change-Id: I39edc809119984585d78d6abbe33f5be707c5818
Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-02-04 19:36:50 +00:00
Jean-Paul Etienne
c989f0b408 riscv32: timer: replace riscv_qemu_driver by the generic riscv_machine_driver
riscv defines the machine-mode timer registers that are implemented
by the all riscv SOCs that follow the riscv privileged architecture
specification.

The timer registers implemented in riscv-qemu follow this specification.
To account for future riscv SOCs, reimplement the riscv_qemu_driver by
the riscv_machine_driver.

Change-Id: I645b03c91b4e07d0f2609908decc27ba9b8240d4
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-02-03 19:20:52 +01:00
Benjamin Walsh
e440759dbb tests/kernel/poll: test object runtime init functions
Change-Id: I04eac2e5cf5e49ea92fd6195c94a25e783aab253
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
2017-02-03 13:54:01 +00:00
Benjamin Walsh
31189d9ec8 tests/kernel/poll: verify tag is untouched by API
Change-Id: I56f0f0db64c20db40c26b197bba8f1e6bb80a499
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
2017-02-03 13:53:59 +00:00
Jithu Joseph
1eba370efd tests: kernel: import pool/heap tests to unified kernel
Jira: ZEP-932

Change-Id: I4adf43f63db8dca7c252e40433f6ff0095dc1f26
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-03 05:19:46 +00:00
Jithu Joseph
cacb2edfb7 tests: kernel: port mutex/priority inheritance test to unified
Jira: ZEP-932

Change-Id: I41728a1448998e32c9ad8217f132afbfafbae3d7
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-03 05:19:46 +00:00
Jithu Joseph
10e36609b6 tests: kernel: import libs test to unified kernel
This tests access to standard libraries. Adapted
to use ZTEST.

Jira: ZEP-932

Change-Id: I3564bfa61221b2456323c1018402237b6129b5ca
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-03 05:19:45 +00:00
Jithu Joseph
9659fec761 tests: kernel: import errno test to unified
Jira: ZEP-932

Change-Id: I59b3d0aebc7df37c9b59e8bf1358d20500f24f57
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
2017-02-03 03:21:05 +00:00
Jithu Joseph
5800f16484 tests: kernel: import floating point sharing tests to unified
This is the microkernel version of the FPU sharing test from legacy
modified to  use unified APIs directly.

Jira: ZEP-932

Change-Id: I133a1466ea75201a97c2f8b83c3586fea0a19447
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-03 03:20:32 +00:00
Benjamin Walsh
ed536245f7 tests: add poll kernel test
Change-Id: I87af7c404b9c77fd82746e5bc2baf4df74d9380c
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
2017-02-02 00:30:01 +00:00
Jithu Joseph
01652bd876 tests: kernel: import irq_offload test from legacy
This test was not using any legacy APIs, so simply
removed legacy from conf and ini's.

Jira: ZEP-932

Change-Id: I5a4b475ac5056b6d6aa64baef6bda53f20d8548e
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
2017-01-31 12:20:50 +00:00
Kumar Gala
434fad045a arm: cmsis: Convert _ScbNmiPend to use direct CMSIS register access
Jira: ZEP-1568

Change-Id: I56231084baaec4f6232f1ef4ebabe4f3fdb5175c
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-30 11:02:38 -06:00
Sergio Rodriguez
fdf9238382 tests: context: Verify for out of bounds array
The for loop could exit with a out of bounds (variable j) value for
the delayed_threads array, we verify for the variable value before
operating on the array

This issue was reported by Coverity

Coverity-CID: 160078

Change-Id: I6aa1cc325cc363be48cd72b2a58d0a55ec3854bc
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
2017-01-27 18:57:27 +00:00
Jean-Paul Etienne
2d1fd2c947 tests: kernel: threads_customdata: increase STACK_SIZE to 512 for riscv32
In RISCV, stack always grows by a multiple of 16 bytes, even if we are saving
data of size < 16 bytes onto the stack.

Hence, for riscv32 architecture increase stack size to 512 for
threads_customdata, otherwise we experience stack overflow.

Change-Id: I805bc346b8a2c2f4ad6d0db622eb262290af942b
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-01-24 23:03:30 +00:00
Jean-Paul Etienne
bc81926b9a tests: kernel: test_mpool_concept: increase STACK_SIZE to 1024 for riscv32
In RISCV, stack always grows by a multiple of 16 bytes, even if we are saving
data of size < 16 bytes onto the stack.

Hence, for riscv32 architecture a bigger stack size is required for
test_mpool_concept, otherwise we experience stack overflow.

Change-Id: I938aa511efcae66f0131fa1bc23bd68600421885
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-01-24 23:03:29 +00:00
Kumar Gala
3ac51cd82b tests: newlib: disable bluetooth for now
When trying to build with newlib we get:

hci_driver.c: In function 'hci_driver_open':
hci_driver.c:389:10:
error: format '%d' expects argument of type 'int', but argument 2 has
type 'uint32_t {aka long unsigned int}' [-Werror=format=]
   BT_ERR("Required RAM size: %d, supplied: %u.", err,
          ^

This is because we have different types for {u}int32_t between newlib
and mini-libc.  We have to decide how we are going to handle this going
forward.  Various options include use of PRIu32, making mini-libc match
newlib's types, disabling the -Werror=format, etc.

Change-Id: I5df8fa05dd7658e1f6b2eeb8fa84e3270f3dd208
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-24 14:33:43 +00:00
Sharron LIU
110d58c055 tests: kernel: mbox_api: fix uninit variable and unchecked value
"struct k_mbox_msg mmsg" should be initialized before using.
"int" value returned by k_mem_pool_alloc() should be checked.

Coverity-CID: 160083
Coverity-CID: 160470

Change-Id: I35714bf9d76723c5fdd8c2963bf76b42ae1b1867
Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-01-24 13:39:58 +00:00
Sharron LIU
d9a3c92b5b tests: kernel: mpool: fix assert side effect
assert should not contain "i++" which might work differently in a non-debug
build.

Coverity-CID: 160469

Change-Id: Id8fd50127dd93de1676b812ac0888c9ec2e1b5de
Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-01-24 13:39:41 +00:00
Sharron LIU
41d805a235 tests: kernel: mpool: fix unchecked return value
"int" value returned by k_mem_pool_alloc() should be checked.

Coverity-CID: 160471

Change-Id: I7ec19147e7a51997fed890075b06eba30bef9126
Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-01-24 13:39:09 +00:00
Sharron LIU
cd35f06de8 tests: kernel: msgq: fix unused value
"ret" returned from k_msgq_put() should be checked.

Coverity-CID: 160084

Change-Id: I192db3a67ab9489e8338f6636d4c2a6935e98d74
Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-01-24 13:36:15 +00:00
Kumar Gala
098f28983f tests: arm_irq_vector_table: Use CMSIS NVIC APIs directly
Convert testcases to use the CMSIS NVIC APIs or direct NVIC register
access rather than the internal ones so we can remove them in the future.

Change-Id: I2a5a3eae713e66944cf105e7fffa603b88522681
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-23 15:15:55 -06:00
Kumar Gala
2e0c2aff97 arm: nvic: kill _NvicSwInterruptTrigger
_NvicSwInterruptTrigger is only utilized by a testcase for irq handling
on ARM-V7M.  Just put the code into the testcase so we dont need to
support an additional interface.

Change-Id: I763c63c32a7a52918250458351d08b8fa54069dd
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-23 15:15:52 -06:00
David B. Kinder
516e155bb5 tests: update to Apache 2.0 SPDX tags on new tests
Some new tests were added that had the Apache 2.0 boilerplate licensing
instead of the SPDX licensing tag.

Change-Id: I4bde8c9c6e7a6d44bceeffb6bbcff9f62d417648
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-01-21 01:21:21 +00:00
jing wang
64579bc490 tests: add threads customdata api test case with unified kernel
the commit cover basic customdata apis:

k_thread_custom_data_set()
k_thread_custom_data_get()

Change-Id: Ide27cfd59230303767414c7f827d6ad627989a6f
Signed-off-by: jing wang <jing.j.wang@intel.com>
2017-01-20 12:41:56 +00:00
jing wang
6ffe10f50f tests: add pipe test cases which use unified kernel
Add kernel pipe test cases which cover basic pipe apis usage
across thread and isr

Change-Id: I11899411b305535297f2e25056678d5b7df8fb95
Signed-off-by: jing wang <jing.j.wang@intel.com>
2017-01-20 12:09:38 +00:00
jing wang
e49480d590 tests: add fifo/lifo test cases with unified kernel
Add fifo/fifo test cases with unified kernel, which cover
basic apis across differnt contexts - thread and isr

Change-Id: Icb61d3dcd564167b0bd70419c652e0b000869959
Signed-off-by: jing wang <jing.j.wang@intel.com>
2017-01-20 12:09:11 +00:00
Sharron LIU
c570efd63b tests: kernel: added memory pool threadsafe test
TestPurpose: verify API thread safe in multi-threads environment.

Jira: ZEP-1210

Change-Id: I1ff8231db8ebcd5713d6083379d0ebfbdabeeee0
Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-01-20 11:45:47 +00:00
Sharron LIU
6ec8c6ef14 tests: kernel: added memory pool configuration options test
TestPurpose: verify memory pool configuration options.
All TESTPOINTs extracted from kernel documentation.
https://www.zephyrproject.org/doc/kernel/memory/pools.html#configuration-options

Jira: ZEP-1210

Change-Id: Ia5379aabd60e490c4566def21eda600c4c1b08dd
Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-01-20 11:45:46 +00:00
Sharron LIU
61c53373ee tests: kernel: added memory pool concept test
TestPurpose: verify memory pool concepts.
All TESTPOINTs extracted from kernel documentation.
https://www.zephyrproject.org/doc/kernel/memory/pools.html#concepts

ZEP-1210

Change-Id: I6250e4c26ddf361e74a76c23082cfdb376705560
Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-01-20 11:45:45 +00:00
Sharron LIU
415e71e04c tests: kernel: added memory pool api test
TestPurpose: verify memory pool APIs.
All TESTPOINTs extracted from kernel-doc comments in <kernel.h>

ZEP-1210

Change-Id: I7dcc0638e7b9c4d6b5ffe282e4fe41ca520d003f
Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-01-20 11:45:45 +00:00
Sharron LIU
d7a9ac21ce tests: kernel: added memory slab threadsafe test
TestPurpose: verify API thread safe in multi-threads environment.
Thread safe test is explained with more details here:
https://gerrit.zephyrproject.org/r/#/c/9464/7/ test_mpool_threadsafe.c
Please comment if you think it necessary as an extensive kernel test.

Jira: ZEP-1209

Change-Id: I52a7ff393d72785622c047289e7d92286e131cc7
Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-01-20 04:45:04 +00:00
Sharron LIU
9ebf3dc10c tests: kernel: added memory slab concept test
TestPurpose: verify memory pool concepts.
All TESTPOINTs extracted from kernel documentation.
https://www.zephyrproject.org/doc/kernel/memory/slabs.html#concepts

ZEP-1209

Change-Id: I95c6cd666212218b9928356f9439e67a2fcf9b73
Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-01-20 04:44:04 +00:00
Sharron LIU
37402b4161 tests: kernel: added memory slab api test
TestPurpose: verify memory slab APIs.
All TESTPOINTs extracted from kernel-doc comments in <kernel.h>

ZEP-1209

Change-Id: I80bc85e96110e7106b3fc5883b982d71c6a7e50b
Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-01-20 04:43:42 +00:00
Sharron LIU
3cb55002b2 tests: kernel: re-path mslab test
tests/kernel/mem_slab --> tests/kernel/mem_slab/test_mslab
For the purpose to hold other mslab test apps.

Jira: ZEP-1209

Change-Id: I4a72b02a0a5095bb7cfbf73396b6d003ea63f92e
Signed-off-by: Sharron LIU <sharron.liu@intel.com>
2017-01-20 12:28:31 +08:00
David B. Kinder
ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Anas Nashif
9d0e6f08f2 tests: do not use RC_OK, use 0 instead
RC_OK is defined only in legacy.h

Change-Id: I760924285629e3fe567ca30755393ecc754f7c02
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-01-17 19:03:36 +00:00
Benjamin Walsh
7ddec7b471 tests: add test for k_timer_user_data_set/get()
Change-Id: I1baaa4d1a4c1626b3acdbeb4b0bfe58c9b8fff0c
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
2017-01-14 13:06:01 +00:00
Jean-Paul Etienne
d65dae20e3 tests: kernel: threads_scheduling: increased stack size to 512 for riscv32 architecture
Otherwise, not passing sanitycheck

Change-Id: I6dba149750a7d4266fd52851f7e0b139efdba210
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-01-13 20:00:00 +00:00
Jean-Paul Etienne
fa12f10196 tests: kernel: context: account for riscv32 architecture
Added TICK_IRQ definition for CONFIG_PULPINO_TIMER and
CONFIG_RISCV_QEMU_TIMER

skip definition of HAS_POWERSAVE_INSTRUCTION for
CONFIG_SOC_RISCV32_QEMU, since it does not provide
power saving instruction.

Otherwise, not passing sanitycheck.

Change-Id: I43a5c5112d694efdc14c5a0bcb4cafdc196d2680
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-01-13 19:59:30 +00:00