tests: kernel: context: account for riscv32 architecture
Added TICK_IRQ definition for CONFIG_PULPINO_TIMER and CONFIG_RISCV_QEMU_TIMER skip definition of HAS_POWERSAVE_INSTRUCTION for CONFIG_SOC_RISCV32_QEMU, since it does not provide power saving instruction. Otherwise, not passing sanitycheck. Change-Id: I43a5c5112d694efdc14c5a0bcb4cafdc196d2680 Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
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1 changed files with 10 additions and 3 deletions
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@ -65,6 +65,10 @@
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#define TICK_IRQ TIMER_0_IRQ
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#elif defined(CONFIG_ARCV2_TIMER)
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#define TICK_IRQ IRQ_TIMER0
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#elif defined(CONFIG_PULPINO_TIMER)
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#define TICK_IRQ PULP_TIMER_A_CMP_IRQ
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#elif defined(CONFIG_RISCV_QEMU_TIMER)
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#define TICK_IRQ RISCV_QEMU_TIMER_IRQ
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#elif defined(CONFIG_CPU_CORTEX_M)
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/*
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* The Cortex-M use the SYSTICK exception for the system timer, which is
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@ -75,13 +79,16 @@
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#error Timer type is not defined for this platform
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#endif
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/* Nios II doesn't have a power saving instruction, so k_cpu_idle()
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* returns immediately
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/* Nios II and RISCV32 without CONFIG_RISCV_HAS_CPU_IDLE
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* do have a power saving instruction, so k_cpu_idle() returns immediately
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*/
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#if !defined(CONFIG_NIOS2)
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#if !defined(CONFIG_NIOS2) && \
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(!defined(CONFIG_RISCV32) || defined(CONFIG_RISCV_HAS_CPU_IDLE))
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#define HAS_POWERSAVE_INSTRUCTION
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#endif
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extern uint32_t _tick_get_32(void);
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extern int64_t _tick_get(void);
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