tests: add test for gen_isr_table
This test is intended to verify that the SW ISR and vector tables have been populated correctly. Change-Id: Ic7f50c02dc0807d7ddefa710da67f818ff707ad6 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
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4
tests/kernel/gen_isr_table/Makefile
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4
tests/kernel/gen_isr_table/Makefile
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CONF_FILE = prj.conf
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BOARD ?= qemu_x86
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include $(ZEPHYR_BASE)/Makefile.test
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2
tests/kernel/gen_isr_table/prj.conf
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2
tests/kernel/gen_isr_table/prj.conf
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# Nothing yet
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4
tests/kernel/gen_isr_table/src/Makefile
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tests/kernel/gen_isr_table/src/Makefile
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ccflags-y += -I${ZEPHYR_BASE}/tests/include
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obj-y = main.o
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152
tests/kernel/gen_isr_table/src/main.c
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tests/kernel/gen_isr_table/src/main.c
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/*
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* Copyright (c) 2017 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr.h>
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#include <irq.h>
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#include <tc_util.h>
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#include <sw_isr_table.h>
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extern uint32_t _irq_vector_table[];
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#if defined(_ARCH_IRQ_DIRECT_CONNECT) && defined(CONFIG_GEN_IRQ_VECTOR_TABLE)
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#define HAS_DIRECT_IRQS
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#endif
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#ifdef HAS_DIRECT_IRQS
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ISR_DIRECT_DECLARE(isr1)
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{
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printk("isr1\n");
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return 0;
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}
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ISR_DIRECT_DECLARE(isr2)
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{
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printk("isr2\n");
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return 1;
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}
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#endif
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void isr3(void *param)
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{
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printk("isr3 %p\n", param);
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}
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void isr4(void *param)
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{
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printk("isr4 %p\n", param);
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}
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#define ISR1_OFFSET 0
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#define ISR2_OFFSET 1
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#define ISR3_OFFSET 2
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#define ISR4_OFFSET 3
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#define IRQ_LINE(offset) (CONFIG_NUM_IRQS - ((offset) + 1))
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#define TABLE_INDEX(offset) (IRQ_TABLE_SIZE - ((offset) + 1))
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#define ISR3_ARG 0xb01dface
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#define ISR4_ARG 0xca55e77e
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#ifdef CONFIG_GEN_IRQ_VECTOR_TABLE
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static int check_vector(void *isr, int offset)
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{
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TC_PRINT("Checking _irq_vector_table entry %d for irq %d\n",
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TABLE_INDEX(offset), IRQ_LINE(offset));
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if (_irq_vector_table[TABLE_INDEX(offset)] != (uint32_t)isr) {
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TC_PRINT("bad entry %d in vector table\n", TABLE_INDEX(offset));
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return -1;
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}
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return 0;
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}
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#endif
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#ifdef CONFIG_GEN_SW_ISR_TABLE
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static int check_sw_isr(void *isr, uint32_t arg, int offset)
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{
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struct _isr_table_entry *e = &_sw_isr_table[TABLE_INDEX(offset)];
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#ifdef CONFIG_GEN_IRQ_VECTOR_TABLE
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void *v = (void *)_irq_vector_table[TABLE_INDEX(offset)];
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#endif
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TC_PRINT("Checking _sw_isr_table entry %d for irq %d\n",
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TABLE_INDEX(offset), IRQ_LINE(offset));
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if (e->arg != (void *)arg) {
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TC_PRINT("bad argument in SW isr table\n");
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TC_PRINT("expected %p got %p\n", (void *)arg, e->arg);
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return -1;
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}
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if (e->isr != isr) {
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TC_PRINT("Bad ISR in SW isr table\n");
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TC_PRINT("expected %p got %p\n", (void *)isr, e->isr);
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return -1;
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}
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#ifdef CONFIG_GEN_IRQ_VECTOR_TABLE
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if (v != _isr_wrapper) {
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TC_PRINT("Vector does not point to _isr_wrapper\n");
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TC_PRINT("expected %p got %p\n", _isr_wrapper, v);
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return -1;
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}
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#endif
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return 0;
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}
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#endif
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void main(void)
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{
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int rv;
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TC_START("Test gen_isr_tables");
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TC_PRINT("IRQ configuration (total lines %d):\n", CONFIG_NUM_IRQS);
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#ifdef HAS_DIRECT_IRQS
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IRQ_DIRECT_CONNECT(IRQ_LINE(ISR1_OFFSET), 0, isr1, 0);
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IRQ_DIRECT_CONNECT(IRQ_LINE(ISR2_OFFSET), 0, isr2, 0);
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TC_PRINT("isr1 isr=%p irq=%d\n", isr1, IRQ_LINE(ISR1_OFFSET));
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TC_PRINT("isr2 isr=%p irq=%d\n", isr2, IRQ_LINE(ISR2_OFFSET));
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if (check_vector(isr1, ISR1_OFFSET)) {
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rv = TC_FAIL;
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goto done;
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}
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if (check_vector(isr2, ISR2_OFFSET)) {
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rv = TC_FAIL;
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goto done;
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}
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#endif
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#ifdef CONFIG_GEN_SW_ISR_TABLE
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IRQ_CONNECT(IRQ_LINE(ISR3_OFFSET), 1, isr3, ISR3_ARG, 0);
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IRQ_CONNECT(IRQ_LINE(ISR4_OFFSET), 2, isr4, ISR4_ARG, 0);
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TC_PRINT("isr3 isr=%p irq=%d param=%p\n", isr3, IRQ_LINE(ISR3_OFFSET),
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(void *)ISR3_ARG);
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TC_PRINT("isr4 isr=%p irq=%d param=%p\n", isr4, IRQ_LINE(ISR4_OFFSET),
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(void *)ISR4_ARG);
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TC_PRINT("_sw_isr_table at location %p\n", _sw_isr_table);
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if (check_sw_isr(isr3, ISR3_ARG, ISR3_OFFSET)) {
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rv = TC_FAIL;
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goto done;
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}
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if (check_sw_isr(isr4, ISR4_ARG, ISR4_OFFSET)) {
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rv = TC_FAIL;
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goto done;
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}
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#endif
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rv = TC_PASS;
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done:
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TC_END_RESULT(rv);
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TC_END_REPORT(rv);
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}
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4
tests/kernel/gen_isr_table/testcase.ini
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4
tests/kernel/gen_isr_table/testcase.ini
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[test]
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tags = core
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filter = CONFIG_GEN_ISR_TABLES
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