This reverts commit 96def63f10.
This breaks building with xtools for some reason, removing for now while
we figure out what went wrong.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Instead of requiring the dts overlay files to be at the top level
directory (where make is invoked), allow this default to be overridden
by setting DTS_OVERLAY_DIR. This is a directory where the overlays
themselves (which are still named $(BOARD_NAME).overlay) will live.
Change-Id: Ie9796afbd27971650b7636a36149c0d1f8e2b9fb
Signed-off-by: David Brown <david.brown@linaro.org>
This patch adds a dependency for the DTS overlay so that the DTS is
compiled when the state of the overlay file changes.
Change-Id: I2affe67f90f56b1d97384d5cd4e3026abed24253
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The 0.9.1 SDK is now required to cover all architectures and to enable
tests on all plartforms supported.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Eliminate following errors:
make[2]: /home/nashif/Work/sdk/xtools/outdir/x-tools//bin/-gcc: Command
not found
make[2]: /home/nashif/Work/sdk/xtools/outdir/x-tools//bin/-gcc: Command
not found
make[2]: /home/nashif/Work/sdk/xtools/outdir/x-tools//bin/-gcc: Command
not found
Also, usage of CROSS_COMPILE with a predefined toolchain is not required and
complicates things, just call CROSS_COMPILE with the full path if you
want to build with a toolchain not supported with Zephyr.
Change-Id: I93ec4ff2e04d22cee82c8e4b74b652927572b30a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
If the value of the property is a string quote it on output. This lets
us use things like label properties that will have values of strings.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The stm32f4discovery was incorrectly named and should have been
stm32f4_disco. Also added 96b_carbon_nrf51 that was missing from the
list.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add configuration, pinmux, dts and documentation for the STM32L496G
Discovery board based on the STM32L496AG SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Here are the main changes:
* board: Update EMSK onboard resources such as Button, Switch and LEDs
+ update soc.h for em7d, em9d, em11d
+ update board.h for em_starterkit board
* arc: Add floating point support and code density support
+ add kconfig configuration
+ add compiler options
+ add register definitions, marcos, assembly codes
+ fixes in existing codes and configurations.
* arc: Update detailed board configurations for cores of emsk 2.3
* script: Provide arc_debugger.sh for debugging em_starterkit board
+ make BOARD=em_starterkit debug
This will start openocd server for emsk, and arc gdb will connect
to this debug server, user can run `continue` command if user just
want to run the application, or other commands if debugging needed.
+ make BOARD=em_starterkit debugserver
This will start an openocd debugger server for emsk, and user can
connect to this debugserver using arc gdb and do what they want to.
+ make BOARD=em_starterkit flash
This will download the zephyr application elf file to emsk,
and run it.
Signed-off-by: Huaqi Fang <huaqi.fang@synopsys.com>
Now that we can specify what toolchain is intended for each
SOC, enable some more SOCs to be built.
A full sanitycheck run will require the installation of both
RF-2016.4 and RG-2016.4 releases.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
XTENSA_TOOLS_PATH and XTENSA_BUILDS_PATH have been retired.
XTENSA_SDK is now the base directory for the Xtensa SDK. The build
systems will search for toolchains in there, using
CONFIG_TOOLCHAIN_VARIANT to locate the right one. It defaults to
/opt/xtensa.
XTENSA_BUILD_PATHS is now a list of additional directories to search
for Xtensa CPU builds. By default the build system will already search
the builds included in the SDK; this is intended for vendor-supplied
CPU build definitions.
Some whitespace changes made for readability and comments added.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This greatly increases the speed in which test cases are evaluated
on the Xtensa simulator.
The cycle limit parameter was removed, we don't currently need it
since sanitycheck handles killing test cases if they time out.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
classname seems to be expected by some parsers, so use it in the report,
the name now has the same value, we can add some more information once
we have meaningful metadata for the testcases with more details.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This new options makes it possible to only run a subset of the tests
which will allow us to run sanitycheck on multiple hosts and merge the
results into one report. This way we do not need to worry about
selecting specific architectures to be run on a certain host.
The option accepts a string value: x/y where x is the subset and y is
the total, so if we specify --subset 1/5, we will only run the first
fifth of the total tests, --subset 5/5 would only select the last fifth.
To get consistent results, the testcase instance list is now ordered,
to avoid duplications and have full coverage.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add necessary board files, pinmux and device tree in order to have a
usable debug console.
Origin: Original
Change-Id: I280320700352fd36a544c03f4e57d2eeec2449e5
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Adds a new debug support script using pyOCD and configures most NXP
boards so they can use it. frdm_kw41z is the one exception because pyOCD
doesn't yet support kw41z. Tested with pyOCD v0.8.0 and the latest
DAPLink firmware for each board.
Introduces two new environment variables, PYOCD_FLASHTOOL and
PYOCD_GDBSERVER, that allow you to set custom paths to the pyOCD tools.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new debug support script using Segger JLink and configures all
NXP boards so they can use it. Tested with Segger JLink GDB server
V6.14b and OpenSDA v2.1 firmware.
Change-Id: Ia1b297d9c93d21db61379e22f27ae54cda3ad461
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
C library is not actually used by the xtensa port, we only need the
'exit' function. Implement 'exit' in crt1-* and drop remaining
references to the C library.
Change-Id: I8a562363956b4755a6b5baee7acf3726485e5ce3
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Building zephyr for xtensa with gcc requires additional include paths and
additional library (libhal).
Add xtensa sysroot and include paths to CFLAGS when building for xtensa.
The root Makefile then does the right thing adding these parameters to
KBUILD_CFLAGS and KBUILD_ASFLAGS.
Add xtensa libhal to the TOOLCHAIN_LIBS_xtensa. Modify TOOLICHAIN_LIBS to
include arch-specific libraries.
Seems that it would be nice to have TOOLCHAIN_CFLAGS_$(ARCH) with the
same behavior as TOOLCHAIN_LIBS_$(ARCH). It also seems that the SYSROOT
definition doesn't have to be restricted to MAKEFILE_TOOLCHAIN_DO_PASS2.
Change-Id: Ia6703ca067b964ac2f8be8fe8513ca28f101a6a3
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This core configuration was removed from the tree since it cannot
implement irq_offload().
Remove an orphaned block in xtesna.ini.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Add configuration, dts and documentation for the Nucleo L432KC board
based on the STM32L432KC SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Make sure we get full name in the commit message and not the username or
some incomplete data that we need to decipher. We still need to verify
the commiter name that is not part of the commit message body, but this
is out of scope of gitlint.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit provides support for disco_l475_iot1 board
Pinmux driver is provided with initial support definitions
Change-Id: I17b637a8ba0b033014969eca8fffe76319c47c52
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to allow the use of such board, a very preliminar port was
developed. It consists of board files, as well as pinmux, uart, gpio,
spi drivers and device tree files.
Change-Id: I5753064e39e0b023cf4481744c176de26d8dbebb
Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
CC3220SF_LAUNCHXL effectively replaces the CC3200_LAUNCHXL,
with support for the CC3220SF SoC, which is an update for
the CC3200 SoC.
This is supported by the Texas Instruments CC3220 SDK.
Jira: ZEP-1958
Change-Id: I2484d3ee87b7f909c783597d95128f2b45db36f2
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Add initial .shippable.yml for CI integration on github and related
scripts.
Change-Id: I095d125e780bba980e635e218205c8741e753a8e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Currently running "make V=1 flash/debug" does not result in the caller
discovering what commands are run to perform the action because make
calls into an opaque script (which then makes complex invokations of
both openocd and gdb). Make the script more transparent by conditionally
enabling enabling tracing within the script.
We also remove the "Done flashing" message. It is pointless because
openocd has already *told* us it has done flashing ["wrote 16384 bytes
from file .../zephyr.elf in 0.802135s (19.947 KiB/s)"]. It is also
potentially misleading since it tells us we are "Done flashing" even
when we failed to flash anything which risks misleading someone
unfamiliar with openocd.
Change-Id: Icaea28c4b00ac10965726dd4502162b7de080953
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Generate a test report using junit/xunit format with all details and
logs that can be published on the web to show results from a sanitycheck
run.
Output is stored in scripts/sanity_chk/ alongside the CSV file.
Change-Id: I5ea6f409c1f86f408eeae870b90a953e71046da9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Install gitlint using pip:
# pip install gitlint
# gitlint install-hook
This will install the pre-commit hook.
Policies are define in .gitlint. Custom rules are available under
scripts/gitlint.
This script will also run in CI, so avoid CI errors by using the hook
above.
Change-Id: I62750a1fd9369341db29c413a6c4a1677bb0db8a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
To speed up builds, this change allows building the needed host tools
that are built for every application and stores them un
${ZEPHYR_BASE}/bin.
Run 'make host-tools' and then define PREBUILT_HOST_TOOLS to reuse the
host tools across multiple builds.
$ make host-tools
HOSTCC scripts/basic/fixdep
HOSTCC scripts/gen_idt/version.o
HOSTCC scripts/gen_idt/gen_idt.o
HOSTLD scripts/gen_idt/gen_idt
HOSTCC scripts/gen_offset_header/gen_offset_header.o
HOSTLD scripts/gen_offset_header/gen_offset_header
HOSTCC scripts/kconfig/conf.o
SHIPPED scripts/kconfig/zconf.tab.c
SHIPPED scripts/kconfig/zconf.lex.c
SHIPPED scripts/kconfig/zconf.hash.c
HOSTCC scripts/kconfig/zconf.tab.o
HOSTLD scripts/kconfig/conf
$ export PREBUILT_HOST_TOOLS=${ZEPHYR_BASE}/bin
$ make -C samples/hello_world
Now you will notice a speedup when building the application!
Change-Id: Ie0aeee7f9a60b1fd49e7e32d78601f03473d73b8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Only in rare cases should we allow C99 types, so lets warn about it to
catch issues.
Change-Id: I2bacdd4ba98f88482e0b7acc0567ff1139e749bf
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This is a start to move away from the C99 {u}int{8,16,32,64}_t types to
Zephyr defined u{8,16,32,64}_t and s{8,16,32,64}_t. This allows Zephyr
to define the sized types in a consistent manor across all the
architectures we support and not conflict with what various compilers
and libc might do with regards to the C99 types.
We introduce <zephyr/types.h> as part of this and have it include
<stdint.h> for now until we transition all the code away from the C99
types.
We go with u{8,16,32,64}_t and s{8,16,32,64}_t as there are some
existing variables defined u8 & u16 as well as to be consistent with
Zephyr naming conventions.
Jira: ZEP-2051
Change-Id: I451fed0623b029d65866622e478225dfab2c0ca8
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
