Create a dt-bindings/gpio.h file.
Bindings definitions are extracted from existing gpio.h.
gpio dt-bindings file is required because existing gpio.h file could
not be parsed by dts parser.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The i.MX7 SoC is a Hybrid multi-core processor composed by Single/Dual
Cortex A7 core and Single Cortex M4 core.
Zephyr was ported to run on the M4 core. In a later release, it will
also communicate with the A7 core (running Linux) via RPmsg.
The low level drivers come from NXP FreeRTOS BSP and are located at
ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README
The A7 core is responsible to load the M4 binary application into the
RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer,
and get the M4 out of reset.
The A7 can perform these steps at bootloader level after the Linux
system has booted.
The M4 can use up to 5 different RAMs. These are the memory mapping for
A7 and M4:
+---------------+-----------------+---------------------------+
| Memory Name | Start Address | Size |
+===============+=================+===========================+
| TCML | 0x007F8000 | 32KB |
+---------------+-----------------+---------------------------+
| TCMU | 0x20000000 | 32KB |
+---------------+-----------------+---------------------------+
| OCRAM_S | 0x20180000 | 32KB |
+---------------+-----------------+---------------------------+
| OCRAM | 0x00900000 | 128KB |
+---------------+-----------------+---------------------------+
| DDR | 0x10000000 | 256MB |
+---------------+-----------------+---------------------------+
Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
Adds a shim layer around the imx uart driver to adapt it to the Zephyr
serial interface.
Modem mode was introduce to control it as DCE and DTE and can be
configured in the device tree:
modem-mode:
type: int
category: required
description: Set the UART Port to modem mode 0 (dce) 1 (dte)
generation: define
For now only the UART 2 was tested.
Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
Add initial device tree support for the em{7,9,11}d SoC and associated
em_starterkit boards. The device tree at this point specifies cpu core,
memory, interrupt controller, uart's and i2c controllers.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This will generate the necessary configuration for the i2c controller
on quark_d2000.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will generate the necessary configuration for the 2 i2c controllers
on quark_se_c1000.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Applying the change to relevant arch/boards, either in their Kconfig or
the dts specific files.
Taking the opportunity in dw driver to rename the variable the same way
as they are everywhere else in the code (s/dev/dw and s/port/dev) in
init function.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will generate the necessary configuration for the i2c controller on
quark_x1000.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will generate the necessary configuration for the 2 i2c controllers
on quark_se_c1000_ss.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
With upcoming ICs that are not in the nRF5x family, rename the flash
driver and all its dependencies from nrf5 to nrf.
Should also fix the issue introduced by f49150cab6 which broke the
assignment of the flash device due to a partial rename.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Adds a driver for SX1509B I2C GPIO chip. This driver only supports the
basic GPIO features and does not currently implement the LED driver and
keypad matrix features.
Signed-off-by: Aapo Vienamo <aapo.vienamo@iki.fi>
Add initial support for STM32L073xZ SOC which is not very different
from already supported STM32L072xZ.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
Since not all boards enable all devices, we typically have the SoC dtsi
file have a device marked with status = "disabled" and have the
board.dts explicitly enable with status = "ok". Update it so USB on
Atmel SAMD21 work this way.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Added device tree support to the ARM SBCon I2C controller. We utilize
the compatiable "arm,versatile-i2c" the binding from Linux for the some
peripheral block.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Switch the SoC device tree to define a single entry per SERCOM instead
of one per mode.
Define a Device Tree binding for the SAM0 SPI and use it instead of
Kconfig for enabling / disabaling instances
Switch the Arduino Zero, Adafruit Feather M0 Basic Proto, and
Trinket M0 to use the new defintion.
Add the APA102 LED that's on the Trinket as a test.
Signed-off-by: Michael Hope <mlhx@google.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Implements interrupt driven UART for the serial driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Justin Watson <jwatson5@gmail.com>
The spi nodes should have #address-cells and #size-cells properties much
like i2c does. Add these missing properties.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
