Add initial support for STM32L073xZ SOC which is not very different
from already supported STM32L072xZ.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
Most STM32F429 SoCs have 6 SPIs, but STM32F429Vx SoCs only have
4 SPIs. This is one of the rare conditions where device-tree
directive /delete-node/ should be used.
Add spi5 and spi6 node to stm32f429.dtsi. Create file
stm32f429vX.dtsi to delete those nodes and document usage of
/delete-node/ directive.
Signed-off-by: Daniel Wagenknecht <wagenknecht.daniel@gmail.com>
Some stm32f4 SoCs don't support spi2, so remove spi2
device-tree node from stm32f4.dtsi file.
Signed-off-by: Daniel Wagenknecht <wagenknecht.daniel@gmail.com>
stm32f405 is not an expansion of stm32f411, since stm32f411 has more
SPIs than stm32f405.
Fix this by including stm32f401.dtsi in stm32f405.dtsi
(instead of stm32f411.dtsi).
Signed-off-by: Daniel Wagenknecht <wagenknecht.daniel@gmail.com>
Configure ccm size and address via dts. According to the DT
specification, the unit-address of a node must match the
first address specified in the reg property of the node.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
stm32f334 is not an expansion of stm32f303, since
stm32f303 has more I2C, SPI ports than stm32f303.
Fix this by including stm32f3.dtsi in stm32f334.dtsi.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Introduce flash controller nodes for STM32 SoCs that are supported in
the flash driver. This is a precusor to converting the flash driver on
stm32 over to using device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Where missing add compatible = "soc-nv-flash". Also added a label for
all the soc-nv-flash that we might use in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commits adds the "least common denominator" in the
stm32fX.dtsi files and fills the additional SPI nodes
in stm32fXYZ.dtsi files, only for the SOCs where boards
use the additional SPI peripheral.
We could add the rest SPI nodes in the stm32fXYZ.dtsi
files when we add SPI support to other boards.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Add configuration, pinmux, dts and documentation for the STM32L476G
Discovery board based on the STM32L476VG SoC.
Signed-off-by: Arthur SFEZ <arthur.sfez@gmail.com>
stm32f407 SoC is an extension of stm32f405 SoC with additional
support of ethernet and DCMI. Hence, in dts description, this
should be represented by stm32f407.dtsi including stm32f405.dtsi.
The opposite was proposed today in stm32 .dtsi files.
This commit fixes the inclusion model and renames
stm32f407-pinctrl.dtsi into stm32f405-pinctrl.dtsi
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This makes the SoC flash compatible with the common nonvolatile flash
YAML schema, and provides a write alignment. It mirrors work done on
nRF chips for the DFU subsystem.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
This makes the SoC flash compatible with the common nonvolatile flash
YAML schema, and provides a write alignment. It mirrors work done on
nRF chips for the DFU subsystem.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Remove usart2_pins_b as this configuration is not possible
(PA15 could not be mapped on USART2).
Besides usart2_pins_c as this configuration is not used yet,
remove to reserve "usart2_pins_c" for future use
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Default configuration for USART1 (Console output) on board
stm32f3_disco was set on PA9/PA10, which matches Rev-A/B
configuration. Though, on more recent configuration of the
board (Rev-C onward). USART1 is mapped to PC4/PC5.
This configuration has the benefit to support VCP, hence it
is chosen to be set by default.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add board configuration, dts and pinmux based on both
stm32f469i_disco board and nucleo_f412zg board
Signed-off-by: Massimiliano Cialdi <massimiliano.cialdi@powersoft.it>
Stop using CONFIG_I2C_x_DEFAULT_CFG to get the initial value. Since we
only support master mode we always default to it for initial config and
we get the bitrate from the device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
pin-controller reg is already set in stm32f407.dtsi which we include in
stm32f469.dtsi so no need to set it again.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add needed uart pinctrl configuration in pinmux node.
Populate stm32 f1 based boards dts files with references
to uart pinctrl nodes
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add needed uart pinctrl configuration in pinmux node.
This is done thanks to <soc>-pinctrl.dtsi file matching
<soc>.dtsi files
Populate stm32 f3 based boards dts files with references
to uart pinctrl nodes
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add needed uart pinctrl configuration in pinmux node.
This is done thanks to <soc>-pinctrl.dtsi file matching
the <soc>.dtsi files
Populate stm32 f4 based boards dts files with references
to uart pinctrl nodes.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add pinctrl node on stm32l4 soc dts files, including uart
pinctrl configurations. This is done thanks to <soc>-pinctrl.dtsi
file matching the <soc>.dtsi file
Populate stm32 l4 based boards dts files with references
to uart pinctrl nodes
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to simplify maintenance of dts files for
stm32f4 series, introduce a stm32l4.dtsi file which
represent the smallest common denominator of IPs in
the family.
This allows to fix usart4 availability on stm32l432
which was not correct.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to simplify maintenance of dts files for
stm32f1 series, introduce a stm32f3.dtsi file which
represent the smallest common denominator of IPs in
the family.
Besides, stm32f334 includes stm32f303, as it is a
extension of this SoC.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to simplify maintenance of dts files for
stm32f1 series, introduce a stm32f1.dtsi file which
represent the smallest common denominator of IPs in
the family.
Besides, stm32f103Xe includes stm32f103xb, as it is a
extension of this SoC.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
