Use the existing debugserver target also for Qemu debugging. Qemu
should be maintained as one of many emulation/simulations platforms and
emulation should be abstracted in the Makefiles and not tied to Qemu.
qemugdb will still work, it is however being deprecated.
Change-Id: I0cd10fb66debb939b8f7f1304bf2ef4605da6a1d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Re-add board documentation and integrate into the project online
documentation.
Setup sphinx to pick any new board documentation added to boards/*.
Change-Id: Id208d5ef923f8806135879dd33a55ed527dc5f27
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Disk IO functions are used by both FS and USB Mass Storage.
This patch refactors those from FS directory to a separate one.
In addition existing, config options were modified to make
stuff meaningful.
Jira: ZEP-1276
Change-Id: Ia2a2e18f3dbbbdb964c3dc0427d8138ad86134cd
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Remove legacy option and use SYS_CLOCK_EXISTS where appropriate.
Change-Id: I3d524ea2776e638683f0196c0cc342359d5d810f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Enable arc to access the spi controller on I/O fabric.
There are two spi controllers on quark se SoC. One is attached
to the I/O fabric and the other one is in the sensor system.
X86 cpu is only able to access the spi controller on the I/O
fabric and the access is supported by existing code. HW allows
arc to access both controllers. But, the existing code only
gives arc access to the controller in the sensor sub-system.
Let's grant arc the access to the controller on I/O fabric as
well by the following changes.
1. Add spi_qmsi.c into arc compilation.
2. Use the already defined macros to choose interrupt numbers
and do interrupt unmasking automatically based on the
compilation targets.
3. Add new symbols in Kconfig including driver names for both
controllers
Jira: ZEP-1190
Change-Id: I40a5d423d4b7986a897834d1a3831938005eda6f
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
ZEP-1317 records a problem were em_starterkit appears to boot up
EM7d, sometimes, due to a misread of the dip-switches.
This could be a mechanical issue. I am seeing it on my board too,
and I often have to struggle with the dip-switch to get it to boot
EM9D. For automated-testing, perhaps it is better if the default is
EM7D, since this is the all-switches-up and contact in the switch
isn't needed. Meanwhile, I'll work with our board team to try to get
to the bottom of this.
ZEP-1317
Change-Id: I41095c1d8b07ce156cc3856a50196c064af2ee18
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The basic button sample expects SW0_GPIO_NAME and SW0_GPIO_PIN macros to
be defined by board.h. The frdm_64f doesn't have a physical switch with
this name, so create an alias to SW3 to make the sample work.
Change-Id: I61eb096582d9898dbcb9799e69078ad0c4b700cf
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The basic blinky sample expects LED0_GPIO_PORT and LED0_GPIO_PIN macros
to be defined by board.h. The frdm_k64f and hexiwear_k64 boards don't
have a physical LED with this name, so create an alias to the green LED
to make the sample work.
Change-Id: I3426c571bb2e3165dbd9f4372d863b474c35fd5c
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Previously, UART clock enable was done in pinmux init.
This is now moved into soc initialization, along with other
power related initialization routines.
Change-Id: I1f9464655ad966e9caac2d238006f12a06b202ab
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Previously, running UART applications in Zephyr from sFlash would
not show consistent character output.
The PRCM clock enable for UART was missing the sleep mode while
enabling the UART clock.
This has been fixed, and verified with philosophers (polled output)
and shell (interrupt driven) zephyr examples running from sFlash.
Change-Id: I95a87996f252d82b0c1c13d3f77535971b5cf9c5
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
For the basic samples to work, button and LED definitions are required
in board.h. These map the buttons and LEDs present on the board to
the corresponding GPIOs they are wired into.
In this particular case the LEDs are actually arranged in a 3x9 matrix,
with the GPIOs wired to the rows and columns of said matrix. An upcoming
patch will provide utility functions to access the matrix.
Change-Id: Icce93ee6a08ae28445c6dc4a41529105ac80f14a
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
For the basic samples to work, button and LED definitions are required
in board.h. These map the buttons and LEDs present on the board to
the corresponding GPIOs they are wired into.
Change-Id: Ia0be30cecd8c0ceabb495258480eb6f3ce13d3e5
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
For the basic samples to work, button and LED definitions are required
in board.h. These map the buttons and LEDs present on the board to
the corresponding GPIOs they are wired into.
Change-Id: I2785441c286b95fd77e636e9bf3d68bc9f5a1acc
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
For the basic samples to work, button and LED definitions are required
in board.h. These map the buttons and LEDs present on the board to the
corresponding GPIOs they are wired into.
Change-Id: I60903eb834ef1b2618b0525896c120fca84db177
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
To make way for the upcoming blinky and GPIO support for nRF5x-based
boards, this change addresses the hardcoded dependencies in Kconfig
default configurations of the different boards, moving the common option
defaults to the SoC default configuration itself.
Change-Id: I8db0750311ad5a12b76237b39438376f20f6f496
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds generic definitions for GPIO pins for onboard LEDs and
switches to enable the basic blinky, button, and disco
Zephyr examples for the TI CC3200 LaunchXL.
Change-Id: Iac0ed2ad01285f9e84eea1fa7013771ddd8d3a78
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Leverages the configuration generated by the TI recommended PinMux
utility to enable pins for the 4 GPIO ports on the CC32xx LaunchXL
board, pre-configuring GPIOs for the onboard:
- 3 LEDs, and
- Two user push buttons (SW2, SW3).
The pinmux configuration is used in lieu of a Zephyr
pinmux driver, and is called during board initialization.
Change-Id: Id2403fc2ec3fcc0a62ee5149e1ac596e7e06ead4
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
With the appearance of the nRF52840 IC a new Preview Development Kit
(PDK) board has been introduced. This patch adds basic support for this
new board.
JIRA: ZEP-1418
Change-Id: If5845e75312ec756b968e595e5dc31c4c9624be2
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
In preparation for the new Nordic MDK and nRF52840 IC support this patch
adds the specific nRF52832 IC model in the pca10040 board default
config, so that future boards with different ICs from the same nRF52
series are supported correctly.
JIRA: ZEP-1418
Change-Id: Ic7c2076eeeb33fb729e4dbba2ff4702ab812a826
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
All pins from the existing pin init in
drivers/pinmux/k64/pinmux_board_hexiwear_k64.c were brought forward.
Jira: ZEP-1393
Change-Id: I3eb38dc435809cb7997d5884ff63bf8dd1e54720
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Some pins were not brought forward from the existing pin init in
drivers/pinmux/k64/pinmux_board_frdm_64f.c because they do not appear to
be used anywhere and it increases power consumption to enable them. For
example, 6 pins were enabled as analog inputs, but there is not yet an
ADC driver for the k64. The pins that were not brought forward are:
* PTA 0-2
* PTB 2,3,9-11,23
* PTC 2-4,10,11
Jira: ZEP-1393
Change-Id: I7410f6d993bd0a4df8f80df72e84def73bcf74cc
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch updates defconfig file on V2M Beetle board in order to enable
clock_control and watchdog by default.
It defines also a dummy LED in order to maintain compliance with the
Zephyr test environment.
Jira: ZEP-1300
Change-Id: I40ae4cb19e79ff24e1e351a2185a7191f03664d1
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Add board support for the Nucleo64 L476RG development board.
Change-Id: Ibb5424bc936c67a5d96855617202136d7dea772c
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
There was a misalignment between Zephyr UART device numbering and
SoC UART IP. Device "UART_1" was mapped to IP USART_2, which could
be confusing for user.
This commit allows to align "UART_1" to IP USART_1.
Change is propagated to all STM32F103RB/STM32F401RE based boards and
respective pinmux drivers
Change-Id: Ia8099dfeec7b9c0c686c2a58ccb4dbb1a55b6537
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add defaults for the fxos8700 sensor, including which i2c instance, the
slave address, and interrupt pin.
Change-Id: Ib8a1e451ddfd84d2b2f19b0da846854acc969dcf
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add defaults for the fxos8700 sensor, including which i2c instance, the
slave address, and interrupt pin.
Change-Id: I4b0255308fd5c9b7c43f0f22e8ce2fe86c5e7011
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch fixes the unused parameter warning found at the
Arduino 101 and Galileo pinmux code.
Change-Id: If67538e955ca1c2d12d4b8378f451bd88b4a52ff
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
I notice that many of the other boards here use 1msec for the tick.
I notice also that when switching to unified kernel, scheduling based
on time has a lot more jitter with a 5msec tick.
I think a better default is 1000 ticks per second for em_starterkit.
Change-Id: Icc93345762dbea7d71ca9f4735bcf73f75cde273
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Currently it's only possible to configure those GPIOs through
boards.<h/c> files and thus it's not relevant for board that do not
embed cc2520 but might get one wired to it, unlike
quark_se_c1000_devboard which directly embeds one cc2520.
Change-Id: I819bc1d2de707ea12eb70dc60a40b28f92666e51
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit removes the legacy Contiki based uIP stack.
The new native IP stack must be used after this commit.
The commit also removes following things:
- legacy cc2520 driver
- legacy ethernet drivers
- legacy IP stack samples
and changes these things:
- disabled tests that only work for legacy IP stack
- select new IP stack by default
- enable random number generator by default as it is needed
by the new IP stack
Change-Id: I1229f9960a4c6654e9ccc6dac14a7efb9394e45d
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Add TI CC2520 driver allowing RAW access to radio interface similar
way Bluetooth user channel works. This makes possible to handle radio
channel inside external 802.15.4 stacks, for example export it over USB
and handle in Linux.
Change-Id: I61bb4c8b998ff1e47dc65427ac471f04ec8fea63
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Making sure we build cc2520 driver when native IP stack is used.
Change-Id: I25f3cb38a2da0c7a54ac4befcea217dc70b31028
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The current ARC GCC compiler used in Zephyr SDK v0.8.2 generates
incorrect code when using the "-fno-omit-frame-pointer" option. This bug
should have been fixed in the 2016.03 release of the compiler.
Jira: ZEP-1243, ZEP-1403
Change-Id: I0901f55973c1ea37491b07bf625d0d1918803f3e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
If SPI 1 is selected and GPIO CS trick as well, then do not use
controller's CS but GPIO 0 instead as a CS.
Change-Id: Ifc17cdc44f47b9348f4c655d510349e3124dceea
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Make the blinky application work with this board.
Change-Id: Ibe8d310229e2ff79a2164b7c8f16e7ba3ee0b8c2
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add board support for ARM V2M Beetle platform.
ARM V2M Beetle board is build around the ARM Beetle Cortex-M3
based processor.
The support has been tested in nanokernel mode with the bringup
application that will be pushed with a future patch.
Jira: ZEP-1245
Change-Id: Ib05a40c072f10149e692283177387cf2cfe32f66
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The right flag to enable GPIO as SPI CS is SPI_CS_GPIO.
Change-Id: I06fc5e7e44f9aa6bad5867462c6c069d545bb0b7
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
The Quark SE C1000 BLE Core is a nRF51822-QFAA, with 16kB of RAM and
256kB of flash. The configuration is otherwise similar to the Arduino
101 BLE, except that the UART RTS pin is the same as that used by
nrf51_pca10028.
Change-Id: I88cb18876bdde65abcf9a499894f70802046c824
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The SPI_0_CS_GPIO and SPI_0_CS_GPIO_PIN values were defaulting to
something not very usable, because of which e.g. the file system
test app was having to explicitly set the right values in its sample
configuration. Having a proper defaults in the board defconfig means
this isn't needed anymore.
Change-Id: I1399914451c1616588322e25304d40d3dd1151e7
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Board uses nRF51822-QFAA, with 16kB of RAM and 256kB of flash.
The UART has no hardware flow control pins.
Change-Id: I16ffeee15a1f5714c695dc8b38e77fb134ea7a0f
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
