Change the default Bluetooth UART device name to the UART connected to
the arduino header. This allows using the frdm_k64f with a frdm_kw40z
shield board.
Change-Id: Id22950f0a48a7c95bcddc6f1ec044f7a37cb9b72
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Change the default Bluetooth UART device name to the UART connected to
the on-board kw40.
Change-Id: I2ae981bce31a58aed4dc6d3c378fc6f6a0bec76f
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The pinmux configuration is done during board initialization.
This was validated using the following Zephyr apps:
- samples/hello_world
- samples/philosophers
- samples/drivers/uart
- samples/shell
UARTA0 is currently supported.
Change-Id: I85727c622d4d42183cc9f2f8b43d653e245dd17e
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Leverages the pinmux.c file generated by the TI PinMux utility
to enable UART pins. The pinmux configuration is used in lieu of a Zephyr
pinmux driver, and is called during board initialization.
UARTA0 is currently supported.
Jira: ZEP-1109
Change-Id: Iddb01f79043af034886859b608b7b6aadf844e53
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Added Kconfig and makefiles to be able to build a Zephyr application
on Linux/gcc, and load via OpenOCD.
Validated by running the hello world, and philosophers microkernel
samples, and stepping through the code in gdb.
Jira: ZEP-1109
Change-Id: If5d3e7b1a8ecf5ecf6a00f147742b3bc5716190f
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The k64 SoC has multiple instances of many peripherals, but which
instances can actually be used depends upon the board design and pinmux
configuration.
Move all instance-specific default driver configurations from the SoC to
the boards (frdm_k64f and hexiwear_k64). Default driver selection
remains in the SoC (e.g., enable the KSDK I2C driver when I2C is
enabled).
This paves the way to support different driver defaults for the
frdm_k64f and hexiwear_k64 boards, but it does not yet change any of the
default values; it only changes where the default values get set.
Change-Id: Id9ed898762eb400ecefeac91ae4dce66da05622d
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
STM32Cube uses SoC defines made to reflect HW heterogeneity that
should be taken into account by SW.
Aim of this commit is to adapt values used by Zephyr to the same
diversity. This will help create new SoC values only when justified
by a real hardware difference that should be taken into account
by software.
For instance, for SoC stm32f401re following define is used:
*STM32F401xE
Which means:
*Same SW could be used on STM32F401RE and STM32F401CE:
same CONFIG_SOC could be used
*Different SW should be used on STMF401RE and STM32F401RC:
different CONFIG_SOC should be used
This change focuses on stm32f4xx series.
Change-Id: I56ff4d1815d09747cf722385532eb2dcbdf37b44
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32Cube uses SoC defines made to reflect HW heterogeneity
that should be taken into account by SW.
Aim of this commit is to adapt values used by Zephyr to the same
diversity. This will help create new SoC values only when justified
by a real hardware difference that should be taken into account
by software.
For instance, for SoC stm32f103rb following define is used:
*STM32F103xB
Which means:
*Same SW could be used on STM32F103RB and STM32F103VB:
same CONFIG_SOC could be used
*Different SW should be used on STMF103RB and STM32F103R4:
different CONFIG_SOC should be used
This change focuses on stm32f1xx series.
Change-Id: I5ecfaa52952d04421b27b5e74fb71b4fc108b662
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
With the driver for AON GPIO available to the ARC side, the user
buttons in the board are usable by both cores.
Change-Id: Ib8e67fba1513caec2e89c31c16f7ed0458c4ed76
Signed-off-by: Iván Briano <ivan.briano@intel.com>
These options were only needed for a MyNewt-based nRF51 firmware on
these boards (the MyNewt BLE stack is called Nimble, hence the
prj_nimble.conf sample config files). With a Zephyr-based nRF51
firmware these options are no-longer needed, so it's not appropriate
to have them default to enabled. Instead, if they are needed, require
the app-specific configuration to enable them.
Change-Id: Iefbee4d97590af4e11bcedea05fe61f32a147b83
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Board uses nRF51822-QFAA, with 16kB of RAM and 256kB of flash.
Change-Id: I92b543022ae6103683cc9e16b925508fb3cf7db1
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Move common config options one level up to try to simplify the per-board
defconfig
Change-Id: I3d80fa494050634d0f877af2015b01b85df20d1d
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for the STM32F401 chip on the board
Change-Id: I96c0799f3658ecea096fa5971bce9faf21919ee1
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Those defined will be used in sample applications that deal with
on-board LEDs.
Change-Id: Ia447adfd33547e01206a9fd7ceeae420ba806f31
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The BLE core on the Arduino 101 is an nRF51822 QFAA (256kB flash, 16kB
RAM).
Change-Id: Ia802b3eb634c0cd6775c4059c9569bccd915a578
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Removing options that are already set by the soc Kconfig files.
Change-Id: I603c7797a26e3afedfa5ee72fe989c614c080fe5
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
If a deprecated board is built, a warning is presented indicating
what future release the board will be removed.
Change-Id: Ib166198d8b71303b990a30f79429f51871591a97
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The value for CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC needs to be set
in the SOC, since each SOC will have a different frequency
on the EM Starterkit. The EM7D, for example, has a 30Mhz CPU clock.
It was already being defined in the SOC, but the board setting
would override the SOC.
Change-Id: I4daf3b94f15bad99c0f3c8674a15ad225aa3d274
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Introduce an architecture sorting of boards. This is to allow for
easier maintenance going forward as the number of boards grows. It
will be easier for any scripts to know the board/arch mapping without
having to maintain an explicit list of what boards are associated with
which arch. We can also do things like have architecture maintainers
cover reviews and branches for arch/${ARCH} and boards/${ARCH} going
forward.
Change-Id: I02e0a30292b31fad58fb5dfab2682ad1c5a7d5a7
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The exact pin numbers for the nRF5 UART configuration is
board-specific, so the Kconfig default values should be in a
board-specific file.
Change-Id: Ibaacde292db191221e32b3626c68bf972dd26016
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Add board support for the Nordic Semiconductor's nRF51822 (nRF51 series)
Development Kit.
Change-Id: Idc082c6930bdebf3726fd453fb1309df7fab3f46
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
The EM7D SOC is similar to EM11D, except it has different sized
iccm and dccm memories, and also has FIRQ with RGF_NUM_BANK==1.
To select this SOC on the board, all dip switches are in the up position.
See ZEP-966.
Change-Id: I864ffe0efdf367de0a8cd58e9c46efd7e401c671
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The hexiwear board pairs two Kinetis SoCs - k64 and kw40. The k64
already has SoC support in Zephyr, therefore we are adding support for
another board for the same SoC. Note, however, that hexiwear uses a
different SoC package than the Freedom board and therefore has a
different part number and pinout.
The second SoC on the hexiwear board, kw40, runs a BLE controller stack
with HCI; it does not run Zephyr (yet).
Jira: ZEP-716
Change-Id: I206f6ef58010d13075a00432040894392117e3ce
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Using AON for GPIO kconfigs is very specifc to quark se, there
is no need to make this special for this platform. Use the
existing scheme instead.
Change-Id: I946431490380dc0f537d6056277a94c9c9c80fed
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Exposes the SPI 1 pins by default in the pinmux
only if the SPI 1 device is enabled in the Arduino 101 board.
Change-Id: I9a8ad0942bb1de7130013931e86144139f78c90e
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
Add PTB22, PTE26, and PTB21 to the frdm_k64f pinmux table, and helper
macros to board.h to map them to red, green, and blue LEDs respectively.
Change-Id: I257621467e71dfd9bdc5d97d6da444dfb5c58b2b
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add PTC6 and PTA4 to the frdm_k64f pinmux table, and helper macros in
board.h to map them to SW2 and SW3 respectively.
Change-Id: Ia30df9015d6d3c09131b4fbb2f2009ee745f7268
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Point to a new wiki page for the documentation. The old page can be removed
once this patch is committed.
Change-Id: I2b031bfffe10ec24c41c58d0754f2b14d95f5e53
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
restoring of the original firmware is now possible using the
flashpack utility.
Change-Id: I32df4b5bb63fb5f6a318026e9f89b1504bd37f5e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This board is not being used or tested and does not actually
run on any hardware, remove it in favor of well supported boards
for this CPU.
Jira: ZEP-850
Change-Id: I01c825c7eb44d6c321f2ffb88e8899da528921dc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This board is not being used or tested and does not actually
run on any hardware, remove it in favor of well supported boards
for this CPU.
Jira: ZEP-850
Change-Id: Ied681b6059ad74f9d019054292c919a9f938e7d3
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The Arduino 101 comes with a bootloader that supports DFU
and flashing of all cores using the dfu-util package.
This changes the memory layout of the image built for the
Arduino 101 and remove previous work-arounds to allow booting,
including the version-header section in the linker script.
The bootloader expects the text section at +0x30 from the physical
load address and thus requires special treatment in the linker
script.
Other changes by Andrew Boie:
The flash size parameters were both wrong. X86 side has 192K
of flash from 0x4003000 - 0x40060000, the entire span of
sys_flash1.
ARC side is now the span from 0x40010000 - 0x40030000, 128K.
Change-Id: Iecfa5d2b84a3f522d9eca06268d6b8b71a094aaa
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Quark D2000 and SE based boards (but Arduino 101) use QMSI bootloader
by default. QMSI bootloader sets up GDT in the so-called 'basic flat
model' just like Zephyr does by default.
This patch changes Quark D2000 and SE boards default configuration
so they rely on QMSI bootloader and we don't sets up GDT twice.
Change-Id: Ic6e520148b732bd48c00657c6c8138a8d865faef
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Enable the new BLE controller by default in nRF52's Nitrogen board.
Change-Id: I1692fc8853c1971c22a6a62e052d6f04b881ffca
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Enable the new BLE controller by default in Nordic's nRF52 DK
(Development Kit) board.
Jira: ZEP-702
Origin: Original
Change-Id: I578d582536186e326c81f9274faa2c0f1ae851ff
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Originally, x86 just supported APIC. Then later support
for the Mint Valley Interrupt Controller was added. This
controller is mostly similar to the APIC with some differences,
but was integrated in a somewhat hacked-up fashion.
Now we define irq_controller.h, which is a layer of abstraction
between the core arch code and the interrupt controller
implementation.
Contents of the API:
- Controllers with a fixed irq-to-vector mapping define
_IRQ_CONTROLLER_VECTOR_MAPPING(irq) to obtain a compile-time
map between the two.
- _irq_controller_program() notifies the interrupt controller
what vector will be used for a particular IRQ along with triggering
flags
- _irq_controller_isr_vector_get() reports the vector number of
the IRQ currently being serviced
- In assembly language domain, _irq_controller_eoi implements
EOI handling.
- Since triggering options can vary, some common defines for
triggering IRQ_TRIGGER_EDGE, IRQ_TRIGGER_LEVEL, IRQ_POLARITY_HIGH,
IRQ_POLARITY_LOW introduced.
Specific changes made:
- New Kconfig X86_FIXED_IRQ_MAPPING for those interrupt controllers
that have a fixed relationship between IRQ lines and IDT vectors.
- MVIC driver rewritten per the HAS instead of the tortuous methods
used to get it to behave like LOAPIC. We are no longer writing values
to reserved registers. Additional assertions added.
- Some cleanup in the loapic_timer driver to make the MVIC differences
clearer.
- Unused APIs removed, or folded into calling code when used just once.
- MVIC doesn't bother to write a -1 to the intList priority field since
it gets ignored anyway
Issue: ZEP-48
Change-Id: I071a477ea68c36e00c3d0653ce74b3583454154d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Treat the sensor subsystem as an independent board that can send
messages to UART and disable IPM and the messaging interface. IPM
can be enabled by applications that require such interface.
Fix all samples that are affected by this change to make sanitycheck
pass.
Jira: ZEP-451
Change-Id: I3df6af16adefaefec02b97778d6c68ffc920ac35
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Many Kinetis SoCs contain an Oscillator (OSC) module and a Multipurpose
Clock Generator (MCG) module to configure clocks. Adding options to
configure these modules for PLL operation with different external
oscillator frequencies, which can vary across boards. More options may
be added later to support other clocking modes such as FLL.
Jira: ZEP-715
Change-Id: Ia121cc5b464d7e681883507bd756d331a8abd6ef
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This will lead to conflicts and warning coming from Kconfig, so just
whitelist the board in the samples where this hardware is supported
Jira: ZEP-739
Change-Id: I4a2f3bdcfdb44fc75df0e272c237789ee16e0de1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Kconfig allows selecting NETWORKING_WITH_15_4_TI_CC2520 even if the
current board doesn't support it, and also selects it by default. This
breaks building the 15.4 sample with qemu_x86. Add a config option for
having CC2520 support and enable the choise only if it is available.
In addition, remove unused function from iee802154 code, as it now
fails the tests.
Jira: ZEP-697
Change-Id: Ib082f82acdd0f86d3306bbd3bb827f61b0fd0be1
Signed-off-by: Jaakko Hannikainen <jaakko.hannikainen@intel.com>
Contains an nRF52832 as the main SoC and a LPC11U35 that provides onboard
debugging capabilities and a USB-ISP interface.
Change-Id: Ie6457cc5586bda9bbc0c073f96d23cc2205332c5
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Flashing issues have been resolved. The build system support for
flashing and debugging has been changed back to UFM scenario.
XIP and reset vector no longer disabled. Wiki documentation updated.
Change-Id: Iffe326485c20808dabc1e19e0b18b7b60a83d797
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
