Commit graph

3814 commits

Author SHA1 Message Date
Maureen Helm
0439deeac6 arm: Clear primask and faultmask during startup
A bootloader may leave primask or faultmask set, so clear them during
startup when we enable interrupts and switch to the main thread.
Previously we only cleared primask for architecture variants which don't
support basepri, but now we do it for all architecture variants.

Fixes a failure on mimxrt1050_evk with the latency_measure test and
shell_module sample when using an nxp internal bootloader.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2018-09-11 08:36:57 -04:00
Filip Kubicz
990a0e8c71 dts: add SPI bindings for nRF family
This change adds DTS definition of SPI device for nRF chips.
It also removes SPI pin configuration from Kconfig and moves it to
chip DTS.

Signed-off-by: Filip Kubicz <filip.kubicz@nordicsemi.no>
2018-09-11 11:41:37 +02:00
Filip Kubicz
5c3992f34f dts: update I2C bindings for nRF chips
Change 'nRF5' family names to 'nRF' in I2C DTS.

Signed-off-by: Filip Kubicz <filip.kubicz@nordicsemi.no>
2018-09-11 11:41:37 +02:00
Daniel Leung
8708611fab adc: add native driver for Quark D2000
This adds a native ADC driver for Quark D2000.

Original: origin

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-09-05 18:38:57 -04:00
Sathish Kuttan
c5f04d7c24 arch: xtensa: remove extra #endif
Remove extra #endif that should have been removed when the
corresponding #ifdef CONFIG_KERNEL_EVENT_LOGGER_SLEEP was
removed in commit a2248782a2

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-09-04 14:27:33 -04:00
Anas Nashif
3298905bfe xtensa: removed obsolete headers
Went in by mistake in a bad rebase, fixes #9753.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-01 13:58:46 -04:00
Punit Vara
c995c4b42b dts: arc: Use dts tree for designware driver
Get required data from dts tree.

Signed-off-by: Punit Vara <punit.vara@intel.com>
2018-08-29 13:46:57 -04:00
Punit Vara
ef83943387 drivers: Use Designware driver for sensor subsystem
Remove adc_qmsi_ss to use designware driver for sensor subsystem

Signed-off-by: Punit Vara <punit.vara@intel.com>
2018-08-29 13:46:57 -04:00
Justin Watson
4e551aabb6 sam: adc: Updated SAM ADC driver.
Updated to work with new ADC API.

Signed-off-by: Justin Watson <jwatson5@gmail.com>
2018-08-29 13:46:57 -04:00
Andrzej Głąbek
0a97b5bf35 dts: nrf: Add ADC nodes and bindings for nRF SoCs
This commit adds ADC nodes to DTS files for nRF SoCs and introduces
corresponding  bindings for these nodes.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-08-29 13:46:57 -04:00
Yannis Damigos
d2e713f9ef arch: stm32l4: Enable gpio interrupts correctly
Enable gpio interrupts correctly and don't
disable the already enabled interrupts.

Fixes #9630

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-08-29 08:53:09 -04:00
Yannis Damigos
32a6fa1c58 arch: st_stm32: Remove I2C and SPI instances from common defconfig
Remove I2C and SPI instances when enabling I2C_STM32 and
SPI_STM32 drivers.

It allows to enable the drivers if ports I2C_4, SPI_4,
SPI_5, SPI_6 are selected.

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2018-08-29 07:04:32 -05:00
Kiril Zyapkov
64b130683c arch: arm: stm32l4: add missing I2C_3 to dts.fixup
One can enable I2C_3 in kconfig and set status = "ok" in dts, but
the driver expects to find the config as fixed up with this
addition.

Signed-off-by: Kiril Zyapkov <k.zyapkov@allterco.com>
2018-08-28 13:18:44 -05:00
David B. Kinder
1c29bff055 doc: fix kconfig misspellings
Fix misspellings in kconfig files missed during regular reviews

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-08-28 13:58:46 -04:00
Adithya Baglody
511edf0175 Revert "sam_e70: enable instruction and data caches on sam_e70"
This reverts commit c0907762f3.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-28 13:46:47 -04:00
Anas Nashif
c0907762f3 sam_e70: enable instruction and data caches on sam_e70
The Cortex-M7 CPU included in the SAM e70 SoCs has instruction and data
caches that significantly boost the performances. Enable them during the
SoC initialization.

Fixes #8138

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-27 10:09:19 -04:00
Sebastian Bøe
69d8c1c08c syscalls: Correct the type of _k_syscall_table
_k_syscall_table is an array of function pointers and is declared as
such in C sources, this makes it an STT_OBJECT[0] in the symbol
table. But when the same symbol is declared in assembly, it is
declared to be a function, which would make the symbol an STT_FUNC.

When linking with LTO this type inconsistency results in the warning:

real-ld: Warning: type of symbol `_k_syscall_table' changed from 2 to
1 in /tmp/cc84ofK0.ltrans8.ltrans.o

To fix this warning we declare the table with GDATA instead of GTEXT,
which will change the type from 'function' to 'object'.

[0]
https://docs.oracle.com/cd/E19455-01/816-0559/chapter6-79797/index.html

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-08-26 08:54:27 -07:00
Aurelien Jarno
069d409b29 arch: arm: stm32: enable instruction and data caches on STM32F7
The Cortex-M7 CPU included in the STM32F7 SoCs has instruction and data
caches that significantly boost the performances. Enable them during the
SoC initialization. Note that the D-cache should only be enabled if it
is disabled, to workaround CMSIS issue #331.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-08-25 07:15:33 -07:00
Wayne Ren
0be1875e42 boards: cleanup and update the default config of arc boards
apply to snps arc boards

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-24 09:31:24 -07:00
Piotr Mienkowski
f69199777f soc: efr32fg1p: correct clock initialization sequence
This patch changes clock initialization sequence to initialize external
cristal oscillators only if it was not done before. Initialization of
external cristal oscillators may be performed by the bootloader.

Tested on BRD4250B evaluation board.

Fixes #9471

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2018-08-22 11:06:58 -05:00
Ramakrishna Pallala
1301cc636b arch: arm: nordic_nrf: Add an API to check for valid PM state
Add an API _sys_soc_is_valid_power_state to check if a PM state
is valid or not.

Signed-off-by: Ramakrishna Pallala <ramakrishna.pallala@intel.com>
2018-08-22 08:07:14 -07:00
Wayne Ren
506f21b631 arch: arc: small optimization in mpu driver
to avoid _get_num_regions to access the aux
reg each time in the for loop

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-22 07:57:11 -07:00
Wayne Ren
eab5ff725d arch: arc: put the init context into privileged stack
as the thread is created in privileged mode, the init
context should also be in privileged stack.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-22 07:57:11 -07:00
Wayne Ren
fa9fb831ed arch: arc: re-orgnize the code in _new_thread
re-orginize the code in _new_thread to make it
easier to understand and maintain

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-22 07:57:11 -07:00
Wayne Ren
a1504c3c0d arch: arc: set the right init status for user space
The fake exception return is used to jump to user mode.
So the init status of user thread is in exception mode.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-22 07:57:11 -07:00
Wayne Ren
d68c016793 arch: arc: enable stack check when arc is in secure mode
when arc is in secure mode, SSC bit of sec_stat,
not SC bit of status32,is used to enable stack check.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-22 07:57:11 -07:00
Wayne Ren
f3d2893344 arch: arc: stack check will be disabled in exception
stack check bit of status32/sec_stat will be cleared
automically in exception entry.

so remove the redundent codes

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-22 07:57:11 -07:00
Diego Sueiro
d1219f4e29 arch/mcimx7_m4: Add i.MX7 Solo Kconfig SoC partnumber define
Adds the proper Kconfig entries for the i.MX7S partnumber presented
on WaRP7 board.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-08-21 18:54:41 -05:00
Diego Sueiro
671cb652a1 arch/mcimx7_m4: Add pad, clock and gate config for GPIO7 and UART6
Adds the necessery configuration for using the GPIO7 and UART6 on
i.MX7 platforms.

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
2018-08-21 18:54:41 -05:00
Anas Nashif
483910ab4b systemview: add support natively using tracing hooks
Add needed hooks as a subsystem that can be enabled in any application.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Anas Nashif
a2248782a2 kernel: event_logger: remove kernel_event_logger
Move to more generic tracing hooks that can be implemented in different
ways and do not interfere with the kernel.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Anas Nashif
ac47070d10 tests: qmsi: remove soc watch sample
Remove this feature specific to QMSI and available through samples only
to allow for migration to tracing hooks.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Anas Nashif
b6304e66f6 tracing: support generic tracing hooks
Define generic interface and hooks for tracing to replace
kernel_event_logger and existing tracing facilities with something more
common.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-08-21 05:45:47 -07:00
Adithya Baglody
1d27b404a6 tests: benchmarks: timing_info: Enable benchmarks for riscv32.
This patch provides support needed to get timing related
information from riscv32 based SOC.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Adithya Baglody
79f65d4db7 tests: benchmarks: timing_info: Enable benchmarks for nios2.
This patch provides support needed to get timing related
information from nios2 based SOC.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Adithya Baglody
bb918d85f8 tests: benchmarks: timing_info: Enable benchmarks for xtensa.
This patch provides support needed to get timing related
information from xtensa based SOC.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Adithya Baglody
022588e88d tests: benchmarks: timing_info: Enable benchmarks for ARC.
This patch provides support needed to get timing related
information from ARC based SOC.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Adithya Baglody
db0c5ca08b arch: arc: Added benchmark related hooks.
The benchmark application timing_info needs certain hooks to be
present in the kernel to get the accurate measurements. This
patch adds these hook at all the required locations.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Adithya Baglody
a8b0b0d5e8 benchmarks: timing_info: Add hooks in the kernel for userspace.
Added sampling hooks in the kernel needed for userspace benchmarks.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-08-20 06:51:25 -07:00
Ioannis Glaropoulos
6ee0ad2944 arch: arm: add ASSERT in _get_region_attr_by_type
This commit adds an __ASSERT line in _get_region_attr_by_type,
to signal an error if the supplied MPU region type is not valid.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
b956690520 arch: arm: mpu: explicitly add UL in numerical shift operations
This commit adds a UL suffix after numerical digits to ensure
the correctness of certain shift operations.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
2a1fe6e285 arch: arm: implement ARMv8-M MPU driver
This commit implements and integrates the ARMv8-M MPU driver
into the memory protection system for ARM.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
2f0e722167 arch: arm: mpu: move ARMv7m-specific functions in internal header
This commit refactors arm_mpu.c by moving all internal function
implementation that is specific to ARMv7-M architecture to a
separate internal header file. This allows to easily extend
arm_mpu.c to support ARMv8-M by including all ARMv8-M-specific
implementation in a similar internal header.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
5a69648061 arch: arm: refactor _get_region_attr_by_conf(.) function
This commit refactors the _get_region_attr_by_conf(.) function,
so it does the following:
 - it is renamed to _get_ram_region_attr_by_conf(), to reflect
   that it is only used to configure RAM MPU regions.
 - it gets an arm_mpu_region_attr_t object structure pointer
   to fill-in with the derived region attributes.
 - it takes an additional argument (the region base address),
   which allows the function to have a common signature with the
   ARMv8-M version of it (where the attribute derivation needs
   the base address).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
829781d56e arch: arm: refactor _get_region_attr_by_type() function
This commit refactors the _get_region_attr_by_type(.) function,
so it does the following:
 - it takes an arm_mpu_region_attr_t object pointer and use it
   to fill-in the derived region attributes.
 - it performs only the distinguishing between the different MPU
    region types, hiding the actual MPU-specific implementation
	in internal functions.
 - it takes an additional argument (the region base address),
   which allows the function to have a common signature with the
   ARMv8-M version of it (where the attribute derivation needs
   the base address).
 - it returs 0 or succes and a negative non-zero integer
   to indicate an error.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Ioannis Glaropoulos
ff919d5fdb arch: arm: adapt region_init(.) to use arm_mpu_region_attr structure
This commit adapts the _region_init(.) function so it can use
the rasr field of the arm_mpu_region_attr structure, when it
configures the RASR register.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-08-19 11:18:14 -07:00
Sathish Kuttan
824bcaca52 xtensa: intel_s1000: Add SoC level SYS_INIT
Added a SYS_INIT for SoC level initialization of Intel S1000
Added routines for setting up resource ownership for
    DMA, I2S
Added routine to setup power gating and clock configuration

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-08-19 11:06:09 -07:00
Ulf Magnusson
21e63ed2ae arch: arm: kconfig: Remove redundant FLOAT dependencies
The choice that contains FP_HARDAPI and FP_SOFTAPI already depends on
FLOAT, so the choice symbols don't have to.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-08-18 07:54:20 -07:00
Daniel Leung
fc182430c0 kernel: userspace: reserve stack space to store local data
This enables reserving little space on the top of stack to store
data local to thread when CONFIG_USERSPACE. The first customer
of this is errno.

Note that ARC, due to how it lays out the user stack and
privilege stack, sets the pointer itself rather than
relying on the common way.

Fixes: #9067

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-08-17 09:40:52 -07:00
Mieszko Mierunski
4f6aac1a67 dts: nrf5: Changed GPIO and GPIOTE define names
Changed names using nrf5 to nrf for consistency with other drivers.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-08-17 07:29:14 -07:00