Commit graph

6,613 commits

Author SHA1 Message Date
Declan Snyder
85359df09b dts: Renamed NXP usdhc in imxrt6xx
The names of these peripherals in the device tree
did not match the Reference Manual for the RT600.

Added alias for usdhc0 to be able to use SDHC test.

Also fixed a typo in a comment referring to USDHC which should have been
about USB.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2022-08-16 13:43:16 -05:00
Felipe Neves
f01f8f37c0 soc: xtensa: esp32_net: update linker
and adds newlibc fix for esp32_net SoC

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Felipe Neves
d94dc98fd6 soc: xtensa: esp32_net: fixes include paths
that were changed with zephyr prefix  after rebasing.
Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Felipe Neves
d808fa2c6d samples: drivers: ipm_esp32: add return
when ipm driver initialization fails.

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Felipe Neves
6ba5b21337 soc: xtensa: esp32_net: update kconfig
specific of soc to make it compatible to the new toolchain.

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Felipe Neves
382b4144e3 soc: xtensa: esp32: fix app cpu boot
procedure by setting its PC to 0 before reset.

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Felipe Neves
bb6e656ec0 soc: esp32_net: added esp32_net as an option
to use esp32 core 1 as a separate CPU, also
provide infrastructure to load firmware to
that CPU

Signed-off-by: Felipe Neves <felipe.neves@linaro.org>
2022-08-16 18:06:02 +02:00
Pieter De Gendt
7ef643385b soc: arm: atmel_sam: sam4s: add support for sam4sa16c
Add soc support for sam4sa16c variant

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2022-08-16 12:53:50 +02:00
Kumar Gala
9f1f9a4843 peci: remove Kconfig.defconfig* setting of peci drivers
Now that peci drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-16 08:26:11 +00:00
Peter Marheine
4bb16a0247 ITE: enable CPU_HAS_FPU for IT8xxx2
This option was previously enabled only if the M extension was
available, because typical compilers do not provide internal libraries
for RV32IAFC so builds fail at link-time. An appropriately-configured
compiler (such as GCC configured with
`--with-multilib-generator=rv32iac-ilp32--f`) can support such a build
however, so don't lie about the presence of an FPU.

This doesn't affect existing builds because CONFIG_FPU gates use of the
FPU, and is off by default. Enabling CONFIG_FPU will require an
appropriately-configured compiler, possibly also requiring careful
choice of CONFIG_FLOAT_HARD.

Signed-off-by: Peter Marheine <pmarheine@chromium.org>
2022-08-16 08:24:54 +00:00
Yves Vandervennet
7a4bb3b27c can: nxp: enabling MCAN on NXP's lpcxpresso55s36
This commit introduces

 - changes on SoC Kconfig and dts files
 - board specific changes (CAN node status, pinctrl and Zephyr alias)

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2022-08-15 13:37:38 -05:00
Kumar Gala
c54086da54 ethernet: remove Kconfig.defconfig* setting of ethernet drivers
Now that ethernet drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-15 14:32:45 +02:00
Flavio Ceolin
b39d897b09 adsp: gpdma: Move gpdma code to driver
DMA controller ownership can be done in the driver
initialization, it does not need to be part of the SoC. It simplify
the code and remove duplicated definitions.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2022-08-15 08:21:53 +00:00
Aurelien Jarno
72dab5bda9 soc: arm: stm32g0: fix USB-C PD dead battery support
Currently the USB-C PD dead battery support is disabled very early in
the boot process, in order to give access to CC1 and CC2 pins to the
application. However this breaks dead battery support as this instructs
the PD source to stop delivering power.

This commit changes the behavour to keep the internal pull-up in dead
battery pins enable if the UCPD driver is enabled, and the corresponding
UCPD peripheral is also enabled. The code is a bit complex as it aims to
support possible G0 devices with a single UCPD controller (as opposed to
the current one), and also because I haven't found any simple way to
match the UCPD peripheral with the bits in the SYSCFG_CFGR1 register (I
used the same trick with the base address as in the driver).

Given I have not been able to get that working with macros, the check is
done at "runtime", however GCC is smart enough to optimize the code. The
generated code is identical if none of the UCPD peripheral is enabled.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2022-08-15 08:20:29 +00:00
Immo Birnbaum
86d68e15e9 soc: arm: xilinx_zynq7000: add MMU PTEs for all AXI GPIO IP core instances
add the MMU page table entries for all instances of the Xilinx AXI GPIO
controller IP core. Other than any Zynq-7000 peripheral supported so far,
the existance of 1..n instances of the IP core within the FPGA part of the
SoC is optional. Therefore, other than addressing instances of supported
peripherals using their DT node label as has always been the case so far,
the data for the MMU page table is added using the DT_FOREACH_STATUS_OKAY
macro.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2022-08-15 08:11:35 +00:00
Navin Sankar Velliangiri
3a15dc8c31 soc: arm: nxp: Add LPC51U68 support.
Add initial support for NXP LPC51U68 SOC series

Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com>
2022-08-12 16:15:42 -05:00
Declan Snyder
310283dad1 soc: rt: CAAM requires cache write-through mode
The use of the RT11xx CAAM requires
cache write-through mode,
otherwise some tests give a compiler warning.

Add to the soc CMake to do this

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2022-08-12 11:43:37 -05:00
Kumar Gala
2169a09d8a sdhc: remove Kconfig.defconfig* setting of sdhc drivers
Now that sdhc drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-12 17:39:15 +02:00
Kumar Gala
19801debc5 peci: ite_it8xxx2: Move interrupt select to driver Kconfig
The driver really should select PECI_INTERRUPT_DRIVEN instead
of doing it in the SoC Kconfig.defconfig.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-12 14:16:59 +01:00
Gerard Marull-Paretas
ffc90592f8 soc: arm: gigadevice: add initial support for gd32e50x series
Add initial support for GD32E50X series (only GD32507X for now).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-12 14:13:49 +01:00
Anas Nashif
61103d415a intel_adsp: clk: add braces around if/for
add missing curly braces around if/for statements.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-08-12 08:08:32 -04:00
Mahesh Mahadevan
aa061b42b6 soc: nxp_imx: Workaround for SDK macro name variation
The macro INPUTMUX_PINTSEL_COUNT is name INPUTMUX_PINT_SEL_COUNT
on certain SoC's in the SDK.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2022-08-12 11:34:03 +02:00
Kumar Gala
6124ccfccf drivers: ethernet: provide Kconfig means to disable ethernet drivers
There are several test cases that create fake ethernet devices and
expect the fake device to be the only ethernet device enabled.  Some
tests handle this be explicitly disabling actual ethernet drivers,
but this doesn't scale well.

Change drivers/ethernet/Kconfig to utilze a menuconfig option that
wraps all the drivers.  This allows us for those test cases that
don't want any actual ethernet drivers to disable them with a
simple CONFIG_ETH_DRIVER=n.

Note, the fake ethernet devices utilize CONFIG_ETH_INIT_PRIORITY so
we have it outside of the 'if ETH_DRIVER' block.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-12 11:33:43 +02:00
Erwan Gouriou
92b100e2df soc: stm32l5: power: Factorize some code pm_state_set
Factorize actions that do not depend on substate_id in pm_state_set.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-08-11 13:22:58 +01:00
Anas Nashif
2241fb0592 intel_adsp: cavs: irq: simplify code
Put duplicate snippet to get the device into a function.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-08-10 14:30:45 -04:00
Anas Nashif
1df711dea9 intel_adsp: remove unused defines IOAPIC_*
Those IOAPIC defines do not belong here..

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-08-10 14:30:45 -04:00
Anas Nashif
b1074152b0 intel_adsp: move z_soc_irq_* declarations
Move prototype declaration to include/zephyr/arch/xtensa/irq.h.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-08-10 14:30:45 -04:00
Anas Nashif
be2b943cfb intel_adsp: move cavs irq code under cavs/
This code is not common and is CAVS specific, so move it under cavs/
series.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-08-10 14:30:45 -04:00
Anas Nashif
9feaced96f intel_adsp: move power initialization to a common place
Make all series consistent with regard to where code is located and put
the power init code in power.c alongside other power related code.
Reduce soc.c per series to an empty file that can be removed.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-08-10 14:30:45 -04:00
Anas Nashif
fc97a71c4d intel_adsp: use one soc_init for all series
initializing the SoC is the same across series, so put everything in one
place in the common code base.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-08-10 14:30:45 -04:00
Anas Nashif
31e7472f14 intel_adsp: unify boot_core0 across SoC series
We have the same boot flow, unify it and put the code in one place that
is used by all series.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-08-10 14:30:45 -04:00
Anas Nashif
663431077d intel_adsp: cavs: do not check for ace here
This is never built for ace, so remove the ifdef.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-08-10 14:30:45 -04:00
Anas Nashif
020bf56dc8 intel_adsp: acev1x: move sram init code into own file
Just to be consistent with other ADSP series.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-08-10 14:30:45 -04:00
Kumar Gala
ff2a1212bf counter: remove Kconfig.defconfig* setting of counter drivers
Now that counter drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-10 10:46:55 -05:00
TOKITA Hiroshi
dcfb98a182 soc: riscv: gd32vf103: Correct the missing machine timer name change
machine-timer node name changed in #48429.
but Kcondif.defconfig.gd32vf103 not followed it.
It makes misconfigures the RISCV_MACHINE_TIMER_SYSTEM_CLOCK_DIVIDER.
So the machine-timer did not count the actual time.

Correcting node name to fix this problem.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-08-10 13:08:27 +02:00
Attie Grande
df8db2d3f6 soc: atmel_sam0: fix include path for SAMR35
Add the "zephyr/" prefix...

Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
2022-08-10 12:00:11 +02:00
Gerard Marull-Paretas
b74a22924e net: lib: config: remove NET_CONFIG_IEEE802154_DEV_NAME
Remove NET_CONFIG_IEEE802154_DEV_NAME in favor of DT based choice using
zephyr,ieee802154.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-10 11:57:34 +02:00
Kumar Gala
236484456f drivers: kscan: Remove unnecessary Kconfig settings
Have the kscan device enabled in devicetree will now get the driver
enabled by default when CONFIG_KSCAN=y is set.  So we can remove
driver enabling Kconfig values in various Kconfig.defconfig files.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-09 23:37:46 -05:00
Kumar Gala
f2fa572561 entropy: remove Kconfig.defconfig* setting of entropy drivers
Now that entropy drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-09 23:37:33 -05:00
Henrik Brix Andersen
b6376aed9d soc: arm: st: check if clock device is ready before accessing
Add check for device_is_ready() before accessing clock control devices.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-08-09 17:16:16 +02:00
Kumar Gala
63769bd1c1 drivers: display: Remove unnecessary Kconfig settings
Have the display enabled in devicetree will now get the driver
enabled by default when CONFIG_DISPLAY=y is set.  So we can remove
setting driver enabling Kconfig values in various .conf and
defconfig files.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-09 12:27:44 +02:00
Kumar Gala
e31cba26be flash: remove Kconfig.defconfig* setting of flash drivers
Now that flash drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-09 12:27:28 +02:00
Kumar Gala
8429167e1c soc: nordic_nrf: drop IPM support
Only support mailbox as that is the preferred solution on NRF.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-08-08 10:42:32 +02:00
Gerard Marull-Paretas
61361e870b kconfig: remove redundant IEEE 802.15.4 defaults or selections
All IEEE 802.15.4 drivers are now automatically enabled if they are
'okay' in DT and all of its dependencies are 'y', including
CONFIG_IEEE802154. This means individual driver enablement is not
necessary anymore in Kconfig.defconfig files or samples/tests. Boards
need to still make sure any dependencies are enabled, e.g. SPI bus in
some cases.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-05 12:56:47 +02:00
Erwan Gouriou
e12d103a80 soc: stm32: Remove direct COUNTER_RTC_STM32 to COUNTER dependency
COUNTER_RTC_STM32 used to be enabled directly based on COUNTER status.
This should not be the case anymore as we should first check
DT_HAS_ST_STM32_RTC_ENABLED status (which is already done in
drivers/counter/Kconfig.stm32_rtc).

Remove these 3 lines that are not correct anymore.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-08-05 11:42:33 +01:00
Henri Xavier
3ba0cb19ea soc/arm64: Do not allow userspace to directly access peripherals
In some arm64 boards, MMU regions are set so userspace can access all
peripherals (MT_P_RW_U_RW), including the GIC.
This seems like a mistake, which has been copy/pasted in some boards.

Change this to no userspace access by default (MT_P_RW_U_NA),
like the other boards.

Signed-off-by: Henri Xavier <datacomos@huawei.com>
2022-08-05 06:28:57 +01:00
Jay Vasanth
ccb77af3b7 eeprom: Add Microchip eeprom driver skeleton
Prepare for Microchip eeprom driver addition. Update
dtsi, kconfig, cmake and relevant soc files for eeprom
driver addition.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-08-04 18:36:18 +02:00
Yves Vandervennet
cd7dbe92b1 soc: arm: nxp_lpc: lpc55xxx: disabling LPC55S36 IAP support
This is temporary until support has been enabled. lpc55s36's IAP controller
is different and does not match previous implementations.
The Zephyr driver uses a data structure matching the IAP controller to
implement a feature that should normally come out of the ROM.

Since IAP support is not in yet, disabling the option in the SoC's Kconfig
and disabling the node in the device tree is the proper way to go forward.

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2022-08-04 10:47:16 -05:00
Neil Chen
5642d4f805 soc: arm: nxp_lpc: lpc55xxx: LPC55S36: add device support
- Add soc information for LPC55S36

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2022-08-04 10:47:16 -05:00
Daniel DeGrasse
f7f94dd367 drivers: pinctrl: update lpc iocon to support LPC55s3x
LPC55s3x family has an additional analog mode bit available. Update
IOCON binding and IOCON driver to support setting this bit via a pin
control property.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-08-04 10:47:16 -05:00