Commit graph

11,885 commits

Author SHA1 Message Date
Mathieu Choplain
8221d078d7 dts: arm: st: wba: add USB to STM32WBA6x DTSI
Add missing nodes for USB feature to STM32WBA6x DTSI.

(Note: only WBA65 DTSI exists today, but USB is available in other SoCs of
the series - this should be reworked later)

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-22 15:59:27 +03:00
Phi Tran
3bc9d9b6c6 soc: renesas: rx: initial support pm for RX130
Add initial support power management for Renesas RX130

Signed-off-by: Phi Tran <phi.tran.jg@bp.renesas.com>
2025-10-22 15:59:01 +03:00
Jamie McCrae
7ab42e51f0 dts: arm: nordic: nrf5340: Add missing ranges property for QSPI
This was missing the XIP region

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-10-22 15:57:44 +03:00
Jamie McCrae
4edc35772b dts: vendor: nordic: nrf54lm20a: Fix invalid reg for USB
Fixes an invalid reg value which duplicated the parents range
property

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2025-10-22 15:57:34 +03:00
Jordan Yates
9bc84b9359 gnss: gnss_emul: init with pm_device_driver_init
Remove the custom initialisation logic that attempts to duplicate
`pm_device_driver_init`.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-10-22 15:57:08 +03:00
Alain Volmat
e33595e4f5 dts: bindings: video: stm32: add title entry on stm32 video bindings
Add missing title entry in stm32 video device bindings.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
2025-10-22 15:55:42 +03:00
Gerard Marull-Paretas
f1fa897fbd dts: bindings: mtd: jedec,qspi-nor: set qspi bus
This binding is meant to sit on a QSPI bus.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2025-10-22 08:58:21 +02:00
Gerard Marull-Paretas
464bd3e649 dts: bindings: mtd: sifli,sf32lb-mpi-qspi-nor: set qspi bus type
This node defines a QSPI bus type.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2025-10-22 08:58:21 +02:00
Mario Paja
0dde13e02e dts: st: f4: enable sai1 in stm32f4xx series
These changes enable SAI1 A & B nodes in STM32F4xx series.

Signed-off-by: Mario Paja <mariopaja@hotmail.com>
2025-10-22 08:57:45 +02:00
Tom Chang
4ab41ed47b drivers: ps2: npcx: update registers for NPCKn variant
This commit updates register definition for NPCKn variant to match the
datasheet.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2025-10-22 08:57:04 +02:00
Khoa Nguyen
4eefeb34b5 dts: arm: renesas: ra: Add support NPU on Renesas ra8p1 SoC dts
Add support NPU on Renesas ra8p1 SoC dts

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-10-22 08:56:25 +02:00
Khoa Nguyen
1daa161960 drivers: misc: ethos_u: Add support NPU on Renesas devices
Add support NPU driver on Renesas devices

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-10-22 08:56:25 +02:00
Tien Nguyen
61209f6999 dts: renesas: Add flash support for RZ/A3UL, N2L, T2M
Add SPIBSC node for RZ/A3UL
Add XSPI node for RZ/T2M, N2L

Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
2025-10-22 08:55:53 +02:00
Tien Nguyen
8359c4dbd9 driver: flash: initial support for Renesas RZ/A3UL, T2M, N2L
This driver is based on the XSPI driver for Renesas RZ/T2M and N2L,
and the SPIBSC driver for Renesas RZ/A3UL from the HAL.

Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
2025-10-22 08:55:53 +02:00
Henrik Grunmach
dbc16f4e46 dts: soc: nxp lpc55xxx: Add SWO support
Add ITM to common device tree and set the correct clock config
when using SWO as a logging backend

Signed-off-by: Henrik Grunmach <henrik.grunmach@rohde-schwarz.com>
2025-10-22 08:55:31 +02:00
Camille BAUD
520ea0fa9a dts: bflb: Add DMA node for BFLB SoCs
Adds the DMA node

Signed-off-by: Camille BAUD <mail@massdriver.space>
2025-10-22 08:55:21 +02:00
Scott Worley
b61986b2f3 dts: arm: microchip: mec: Add MEC5 HAL based GIRQ information
Microchip MEC SoC's include an interrupt aggregator affecting
the routing of interrupt to the ARM NVIC. IA can not be treated
as a true second level interrupt controller. All interrupt sources
with the exception of GPIOs and eSPI virtual wires can be routed
by IA to individial NVIC inputs. Each bank of GPIOs and VWires
are aggregated into a single NVIC input per bank. For the NVIC
to receive the interrupt signal the respective GIRQ enable must
be set. We attempted to add this informatation by encoding the
DT irq property. This exeperiment failed due to how Zephyr
builds the interrupt tables and MEC IA is not a true second
level interrupt controller. Therefore, drivers for MEC peripherals
need to GIRQ number and bit position to pass to HAL API's or
if a driver is implemented in the linux style without using
the full MEC HAL the GIRQ information is present in DT.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-10-22 08:52:08 +02:00
Lucien Zhao
ae0725bd5c dts: arm: nxp: add mcxe24x device tree
- Use specific_part.dtsi + full_devices.dtsi way to
  desribe all devices

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-10-21 22:55:08 +03:00
Lucien Zhao
eebdcb7b4b dts: bindings: flash_controller: add nxp,kinetis-ftfc.yaml
- add nxp,kinetis-ftfc.yaml for mcxe24x flash controller

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-10-21 22:55:08 +03:00
John Batch
3ef1ff3082 dts: infineon: psc3m5 devicetree changes to support HPPASS ADC
* Separates HPPASS and HPPASS SAR ADC in the device tree
 * Makes HPPASS SAR ADC a child of the HPPASS system to reflect hardware
   architecture.
 * Adds binding files for HPPASS SAR ADC driver.

Signed-off-by: John Batch <john.batch@infineon.com>
2025-10-21 22:54:55 +03:00
Allen Zhang
35c3698448 dts: mcxw23x: Correct the flash0 in common dtsi
According to the RM, erasing must be done per sector. So, the start
address and the size of an erase operation must be a multiple of 8192
bytes. So, the erase-block-size should be 8192 bytes.
Programming can be done per phrase (start address and size a multiple
of 16 bytes). So, write-block-size should be 16 bytes.

Signed-off-by: Allen Zhang <chunfeng.zhang@nxp.com>
2025-10-21 22:52:37 +03:00
Clément Laigle
3920294751 drivers: sensor: add support for OMRON 2SMPB_02E pressure sensor
Support for the OMRON 2SMPB_02E digital barometric pressure sensor.

Signed-off-by: Clément Laigle <c.laigle@catie.fr>
2025-10-21 12:25:45 -04:00
Neil Chen
015c593303 dts: mcxa344: add dts for MCXA344
add dts support for board frdm_mcxa344

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-10-21 12:25:29 -04:00
Mohamed Azhar
a9b253dfd2 dts: arm: microchip: add dtsi files for Microchip PIC32CZ CA SoC series
Adds common and SoC-specific .dtsi files for the Microchip
PIC32CZ CA80 CA90 and CA91 family. These files define core
peripherals, address maps, and interrupt controller structure
shared across the PIC32CZ CA80 9x variants.

Signed-off-by: Mohamed Azhar <mohamed.azhar@microchip.com>
2025-10-21 12:24:04 -04:00
Mathieu Choplain
41513d7813 dts: arm: st: stm32wl: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
f72b0c7989 dts: arm: st: stm32wba: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
58331dd596 dts: arm: st: stm32wb: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
53ed2119f2 dts: arm: st: stm32u5: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
e7dbaaaed8 dts: arm: st: stm32u3: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
1b45342af7 dts: arm: st: stm32u0: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
273d4ef86a dts: arm: st: stm32n6: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
94219699ba dts: arm: st: stm32l5: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
5a7c028041 dts: arm: st: stm32l4: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
0a26950285 dts: arm: st: stm32l1: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
535c056d3e dts: arm: st: stm32l0: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
4581596a16 dts: arm: st: stm32h7rs: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
2a14f656ca dts: arm: st: stm32h7: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
20136226eb dts: arm: st: stm32h5: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
4413b3b170 dts: arm: st: stm32g4: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
817632a8c9 dts: arm: st: stm32g0: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
a6a5793c87 dts: arm: st: stm32f7: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
445fe1be66 dts: arm: st: stm32f4: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
2f983bc9c7 dts: arm: st: stm32f3: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
0b68eb1d60 dts: arm: st: stm32f2: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
00d1308013 dts: arm: st: stm32f1: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
4ae7819b0c dts: arm: st: stm32f0: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant. This avoids the
current situation where the same #include directive is duplicated among
many files, and where the file is sometimes included multiple times when
walking up the inclusion chain up until the root DTSI file.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Mathieu Choplain
c0ac2199ee dts: arm: st: stm32c0: include <mem.h> from series' root DTSI
Include <mem.h> from the series' root DTSI file and remove inclusion of
the file from other levels since it becomes redundant.

There is no consistency about which level of the DTSI inclusion hierarchy
the macros from this header start being used, so including it from the root
file ensures they are always visible and available without headache. Today,
there are places where the header is included twice or more at different
DTSI inclusion hierarchy levels because of this ambiguity - this commit
solves the issue once and for all.

Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
2025-10-21 12:22:30 -04:00
Tony Han
fc42cc662f dts: arm: microchip: sama7g5: add DMA Controller (XDMAC) support
Add dma nodes to sama7g5.dtsi file.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-21 17:26:20 +03:00
Tony Han
f373992271 dts: microchip: add the DTSI file for sama7d6 SoCs
Add the base DTSI file for Microchip sama7d6 SoCs.

Signed-off-by: Tony Han <tony.han@microchip.com>
2025-10-21 17:26:09 +03:00
Lin Yu-Cheng
fed6a9d9b5 driver: espi: implement espi PM function
1. add cs pin as espi driver wake up reference
2. removed the unnecessary update of the cached date
3. removed the unnecessary busy wait in notify funciton

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-10-21 17:25:10 +03:00