Add initial support for the RP2350's DMA peripheral, allow tests
under drivers/dma/loop_transfer to run on on the Raspberry Pi Pico 2,
and update the board's documentation.
Signed-off-by: Manuel Aebischer <manuel.aebischer@belden.com>
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Add initial support for the RP2350's PIO peripherals, extend the
existing example under samples/boards/raspberrypi/rpi_pico/uart_pio to
demonstrate this on the Raspberry Pi Pico 2, and update the board's
documentation.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Signed-off-by: Manuel Aebischer <manuel.aebischer@belden.com>
RP2350 is Raspberry Pi's newest SoC. From the datasheet:
"RP2350 is a new family of microcontrollers from Raspberry Pi that
offers significant enhancements over RP2040. Key features include:
• Dual Cortex-M33 or Hazard3 processors at 150 MHz
• 520 kB on-chip SRAM, in 10 independent banks
• 8 kB of one-time-programmable storage (OTP)
• Up to 16 MB of external QSPI flash/PSRAM via dedicated QSPI bus
...
"
This commit introduces some changes to support the existing RP2040 and
what is describe by Raspberry Pi as the "RP2350 family". Currently there
are 4 published products in the family: RP2350A, RP2350B, RP2354A, and
RP2354A. Within Zephyr's taxonomy, split the configuration as follows:
Family: Raspberry Pi Pico. This contains all RP2XXX SoCs,
SoC Series: RP2040 and RP2350.
SoC: RP2040 and, for now, just the RP2350A, which is present on the Pico
2, where the A suffix indicates QFN-60 package type. This structure is
reflected in `soc/raspberrypi/soc.yml`, and somewhat assumes that there
won't be a RP2050, for example, as a RP2040 with more RAM.
This is foundation work ahead of introducing support for Raspberry Pi's
Pico 2 board, which is fitted with a RP2350A and 4MB of flash.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Add support for SoC-specific clock ids and update the initialization
function to support the existing RP2040 and add support for the RP2350.
clock_control_rpi_pico.c uses numerical values for clock ids taken from
rpi_pico_clock.h which are the "clock generator". For the RP2350 these
values are different for some of the same logical clock sources, as well
as the RP2040 and RP2350 having different clock sources available.
Signed-off-by: Andrew Featherstone <andrew.featherstone@gmail.com>
Add a GPIO driver for the Microchip MEC5 HAL based chips.
Current devices are: MEC174x, MEC175x, and HAL version of
MEC172x named MECH172x.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
This adds initial support for NXP SDMA controller. We make use
of NXP HAL to configure the IP.
SDMA uses BD (buffer descriptors) to describe a transfer. We create
a cyclic list of descriptors and trigger them manually at start and
later when data is available.
This is tested using Sound Open Firmware app on top of Zephyr.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
- rename enable-gpios to en-gpios in adi,tmc2209
- place en-gpios in common stepper-controller.yaml
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
Fast SPIM instances in nRF54H20 (SPIM120 and SPIM121) are driven by
the global HSFLL (HSFLL120). Add `clocks` property in these nodes
to reflect this.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
NXP FlexTimer Module is a configurable timer peripheral hence it should
be located under bindings/timer.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Rename "nxp,kinetis-ftm-pwm" compatible to "nxp,ftm-pwm" to remove the
device family from its name.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Update the GC9X01X display driver binding documentation with the current
MIPI DBI SPI binding structure. The old example used direct SPI device
binding which is now deprecated in favor of the MIPI DBI API.
Signed-off-by: Benjamin Geiger <BenjaminGeiger1@gmail.com>
Add nrf twis (I2C controller supporting I2C peripheral role and
EasyDMA) support, including updating the existing twis dt binding
to match the hardware with proper examples.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
This patch adds support for HOST OpenThread communication to the RCP
co-processor via UART using SPINEL protocol.
The aim is to use OpenThread's RCP (Radio Co-Processor) with HOST device
(for example imxRT1020). Such configuration is the same as one used
with PC program (ot-cli) and RCP.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Removed FLASH_BASE_ADDRESS configuration from various boards' Kconfig.
The only thing needed in order to do this was to update the relevant dtsi
files so that the flash0 node has its reg property configured properly.
Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
- provide support for the STM32C071 serie
- add stm32g0-flash-controller compatible on flash node
to fix CI issue on undefined reference to
`flash_stm32_page_layout'
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
The STM32F4 socs have different channels for the temperature sensor.
Some are at channel 16 and some at channel 18. Made changes wherever it
was relevant.
In short, the base configuration is to channel 16 and wherever it is
supposed to be 18 it is overridden.
Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
Creation of the new zephyr\soc\nxp\common\nxp_nbu.c driver which manage
the interruption of the NBU. This modification is mandatory to support a
coex application which includes Bluetooth and 802.15.4 on the same
narrow band path.
Signed-off-by: Xavier Razavet <xavier.razavet@nxp.com>
This commit Introduces DTS configurations for DMA,
SPI, RNG, Crypto, USB and RTC modules to enable
support in STM32U0.
Signed-off-by: Mohammad Badawi <zephyr@exalt.ps>
Signed-off-by: Sara Touqan <zephyr@exalt.ps>
Add dts node to support for gpio interrupt on Renesas RA SoC
- Add external interrupt node
- Add gpio interrupt pins
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
First commit to add support for gpio interrupt on Renesas RA
- Add support for external interrupt driver
- Add support for gpio interrupt config
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
Move ioport6, ioport7, ioport8 to r7fa6m4ax due to it is common
part of RA6M4
Impacted file:
- dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi
- dts/arm/renesas/ra/ra6/r7fa6m4af3cfb.dtsi
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
