This is a slightly higher level Zephyr device that manages the host
IPC device for applications. There's an interface to make synchronous
and asynchronous calls, to receive commands via (interrupt context)
callbacks and emit async "done" notifications after processing is
complete. It should work for pretty much any application
architecture.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
the stm32h725 family is mostly identical with the stm32h723 family with
the exception that the h725 family has an in-built SMPS.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@escolifesciences.com>
Add the 256 kB On-Chip memory area which is located at 0xfffc0000.
In conjunction with a corresponding 'chosen' entry at the board level,
equivalent to board device trees based on the Zynq-7000, explicit placement
of data in the OCM becomes possible, for example when setting up the GEM
Ethernet Controller's DMA area.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Add a new hwinfo driver to get the reset cause on
SAM4S/SAME70/SAMV71 SoC series.
The user-nrst dts property has been added to enable external user
resets.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Add a new board to support Intel Tiger Lake H PCH variant of cAVS2.5.
Move common Kconfig options for cavs25 to soc level. No need to
replicate these for every board.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Unify the CAN controller configuration done in Zephyr devicetrees:
- Specify a resynchronization jump width (sjw) of 1 time quanta in SoC
devicetrees as this is the most common. Boards can override this if
needed.
- Specify a sample point of 87.5% as recommended by CAN in Automation
(CiA) in SoC devicetrees. Boards can override this if needed.
- Specify a bus speed of 125 kbits/second (arbitration phase) and 1
Mbits/second (CAN-FD data phase) in board devicetrees as this is what
is used by all Zephyr CAN samples.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit implements the temperature sensor interface for
the Maxim MAX31875Low-Power I2C Temperature Sensor.
Signed-off-by: Pete Dietl <petedietl@gmail.com>
Properly set both pull up and down flags explicitly when
making changes.
Properly implement disabling interrupts on a given pin.
Signed-off-by: Peter Johanson <peter@peterjohanson.com>
In nRF53 family of SoCs, GPIO pins must be explicitly forwarded by the
application core to the network core if the latter should drive them.
Add a binding of a generic GPIO pin forwarder.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
The driver was never migrated to Devicetree, this patch converts the
driver to a proper Devicetree based device.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The current MCUX IGPIO driver assumes that the target SoC supports
the DR_SET, DR_CLEAR, and DR_TOGGLE functionality, but some do not
(namely, the M7 core of the i.MX8M Plus SoC). Current releases of
the MCUXpresso SDK IGPIO driver contain utility functions to set,
clear, and toggle pins which include provisions to support SoCs
with and without DR_SET, DR_CLEAR, and DR_TOGGLE, and this change
switches to using these utility functions.
Additionally, this change enables GPIO support on the mimx8ml8_m7
target.
Signed-off-by: Chris Trowbridge <chris.trowbridge@lairdconnect.com>
This adds support for the ads101x (ads1013, ads1014, ads1015) and
ads111x (ads1113, ads1114, ads1115) family of i2c adc devices.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
Introduce a new "zephyr,memory-region" compatible to be used when a new
memory region must be created in the linker script from the devicetree
nodes using the compatible.
Remove also the LINKER_DT_REGION_FROM_NODE macro and add a new
LINKER_DT_REGIONS macro to cycle through all the compatible regions.
In the same PR modify the DTS files and the linker scripts.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This enables the below configuration so the AP and EC are able to
communicate over eSPI:
CONFIG_ESPI_PERIPHERAL_EC_HOST_CMD
CONFIG_ESPI_PERIPHERAL_ACPI_SHM_REGION
CONFIG_ESPI_PERIPHERAL_CUSTOM_OPCODE
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
The last 2k bytes of the data RAM is used by the booter in some npcx EC
chips. This commit adds a bootloader_ram DT node to describe this
additional layout of the RAM. As a result, we can determine the total
RAM size by adding the size of flash0, sram0, and bootloader_ram.
Also, this commit moves 64k bytes from the code RAM (flash0) to the data
RAM (sram0) for npcx7m7fc because its internal flash is 512K bytes.
(In the Chromebook application, we need the code RAM size <= half of the
flash size.)
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The application may not always use the PSL mode. Change the status of
node vsby-psl-in-list default disabled. The application can override it
when it wants to use PSL hibernate.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Intel's adsp needs to set, at a minimum, a clocking bit before the driver
can initialize the designware dma controller. In many ways it is the
designware dmac IP but with additional registers and functionality added
on top of it. So the code structure here follows how the hardware
appears to be designed, layered on top of the designware driver.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This patch adds GPIO and 96board LS (Low Speed)iexpansion connector
support for SiFive HiFive Unleashed and also enables GPIO basic test.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
This is the compatible which is used in the blinky sample, so
it's worth trying to add a better example for what you can do with it
in general in the main description.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Added basic support for the RP2040 SoC. Support
includes booting and starting the kernel, on one
core only.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
As npcx9m3f/npcx9m6f needn't share the upper 2KB of data RAM to Booter,
let's fix the data RAM size from 62KB to 64KB for them.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
the pre-dic is not used in rt11xx series, but for driver compatible
with rt10xx we still need have it in dts
fixing: #42179
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Exposes the RC register so that the initial value can be set in
the device tree. This is useful in the case where the timer
generates an event but an interrupt is not required.
e.g generate event to sample adc on RC register match.
Tested on Atmel SMART SAM E70 Xplained Ultra board
Signed-off-by: Marius Scholtz <mariuss@ricelectronics.com>
Current uart driver implementation is incompleted regarding the
usage of DT_INST_FOREACH_STATUS_OKAY. If uart0 and uart2 are selected,
build breaks due to peripheral number ordering, which would be
0 and 1 in this case. This fix PR fix this by re-working the macros
and setting proper uart peripheral instances in DTSI, required for signal
routing configuration.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
