Enable the alt function with setting both bit5@0xf016f1 and
bit6@0xf02046 bits will cause internal leakage.
Only bit6@0xf02046 bit is required to enable the alt function,
so fix it.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This commit makes the transition from the pinmux driver to the pinctrl
driver. It also modifies UART, SPI and I2C drivers used in FE310-based
boards to use the new pinctrl API.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
The PLL div-p for the stm32g4x has more possible value than stm32l4
possible ra nge is from 2 to 31
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adds an entropy driver that uses Bluetooth HCI commands as its source
of randomness. As this method is blocking, the ISR API is not supported.
As this method will range from relatively slow (same core Bluetooth HCI
controller) to extremely slow (UART HCI Bluetooth controller), use the
xoshiro PRNG by default for RNG generation.
Implements #37186
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
added bindings for vnd,reset used for devicetree test reset
added adc temp sensor as supporting reset
Signed-off-by: Andrei-Edward Popa <andrei.popa105@yahoo.com>
added bindings and compatible for reset controller nodes
added bindings for devices that use the reset controller
Signed-off-by: Andrei-Edward Popa <andrei.popa105@yahoo.com>
Aspeed ast10x0 series SoCs contain a ARM Cortex-M4F processor. This
processor operates at 200MHz and executes on SRAM.
This patch adds support for ast1030 as the first SoC of this series
which is targeted but not limited at the bridge IC in a server system.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Change-Id: I668af1ff8a36a05da791c3329ae08f5ae712bdd4
the tlc5971 driver uses spi for controlling the global brightness
and individiual pixel brightness of a daisy chain of tlc5971
devices.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@escolifesciences.com>
If a user has a 1GB external flash it is currently not possible
to configure this through DTS. To allow for such a configuration
we add an option which specifies the size in bytes not bits.
Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
This commit adds ipc backend, that relies on simple
inter core messaging buffer also added by this commit.
This backend is configurable with DT overlay. Each
ipc instance could be defined with ipc-icmsg commpatible.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
Enable pinctrl for ethernet mcux driver, and update kinetis DTS node to
include labelling for PTP node, to enable driver to access pinctrl
properties.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
kinetis pinctrl driver had swapped values for slew rate
(fast slew rate should set bit to zero). Fix slew rate values.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
- Move the SX oscillator control pins to a regulator node
- Create a board level compatible for the RF switch
- Use gpio_dt_spec to simplify board pins.c (now rf.c)
- Cleanup include list
For reference:
https://downloads.rakwireless.com/
LoRa/RAK811/Hardware_Specification/RAK811_HF_Schematics.pdf
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add build time optional PINCTRL support to common PWM driver
for Microchip XEC MEC15xx and MEC172x families.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Add support for MEC172x series to Microchip XEC PWM driver.
Standardize device tree properties for both SoC families.
Standardize device structure usage.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Add the Vref reference voltage in the DTS, so that the adc driver
can retrieve the value for conversion.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
As mentioned in #42882, the I2C of IT8XXX2 is designed for two different
IP blocks, so this PR divides this I2C driver into two compatibles.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The datasheet for both sam4s/same70 specifies that the NRST pin
is an input after reset, used as a user reset.
Add the user-nrst property to match the default.
Fixes#43306
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Adds 'swj-cfg' property to the F1 pinctrl. It is an optional
property that allows to control Serial Wire JTAG
configuration.
Different configurations allow to free certain IO
pins that can be used in remap or standalone.
That replaces previously used Kconfig approach.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
This contains accessor macros for getting the maximum bitrate supported
by a CAN controller/transceiver combination.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add generic devicetree bindings for simple CAN transceivers.
Always-on CAN transceivers are considered passive and just provide a
maximum supported bitrate.
Active CAN controllers can typically be controlled by the MCU via either
SPI, I2C, or GPIO. Common GPIO controlled CAN transceivers provide
either a stand-by or an enable pin (or both) for controlling the state
of the CAN transceiver.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for the new pinctrl API to the nRF PWM driver.
Update code of the driver and the related devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the new pinctrl API to the nRF QDEC driver.
Update code of the driver and the related devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the new pinctrl API to the nRF QSPI NOR flash driver.
Update code of the driver and the related devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for configuring pins to be used by the nRF PWM, QDEC, and
QSPI peripherals.
A new custom property "nordic,invert" is added to the pin configuration
group binding to allow configuring PWM channel outputs as inverted.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
