Commit graph

8801 commits

Author SHA1 Message Date
Kumar Gala
22806d2d23 dts/bindings: Fixup some clock bindings to match reality
A few clock bindings only have a single clock cell defined, but the
binding described more than one cell.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-07-10 05:23:07 -05:00
Ulf Magnusson
8977d5b317 dts/bindings: Clarify #cells in template
Add a device tree example to make it easier to see how things fit
together.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-07-10 03:45:05 -05:00
Francois Ramu
45eb589c5c dts: remove unused clock-controllers property #17122
The 'clock-controllers' property is not specified and not used for any
generation.  Lets remove it.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-07-05 10:35:55 -05:00
Francois Ramu
26c38a49a2 soc: arm: uart: Add STM32G0X UART support
Add UART support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-07-05 10:35:55 -05:00
Francois Ramu
dd3ee06af7 drivers: gpio: Add STM32G0X pinmux support
Add gpio support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>

# Conflicts:
#	drivers/gpio/gpio_stm32.h
2019-07-05 10:35:55 -05:00
Francois Ramu
9b2025c891 drivers: pinmux: Add STM32G0X pinmux support
Add pinmux support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>

# Conflicts:
#	drivers/pinmux/stm32/pinmux_stm32.h
2019-07-05 10:35:55 -05:00
Francois Ramu
da48451a01 drivers: pwm: Add STM32G0XX pwm support
Add pwm support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com
Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-07-05 10:35:55 -05:00
Francois Ramu
624c566306 drivers: clock_control: Add STM32G0XX clock support
Add clock support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com
Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-07-05 10:35:55 -05:00
Francois Ramu
bfc2ea6dd5 drivers: flash: Add STM32G0XX flash support
Add flash support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com
Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-07-05 10:35:55 -05:00
Francois Ramu
7ea00134f5 soc: arm: st_stm32: Add STM32G071 SoC series
This patch adds support for the STM32G071xx
 from STMicroelectronics.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>
2019-07-05 10:35:55 -05:00
Erwan Gouriou
f81176aa31 dts/arm/st: l0: Fix gpioe reg address
Fix reg to 0x50001000.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 09:22:47 -04:00
Erwan Gouriou
d424385d27 dts: stm32h7: Add dtsi for m4 core
This change adds sram1 plus m4 core package level dtsi.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Erwan Gouriou
fda2ea7253 drivers/serial: stm32: Add support for STM32H7 series
Add needful to enable uart on STM32H7.
This mostly impact dts but as well soc for fixup.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Erwan Gouriou
d185ec4cff drivers/gpio: Add support on STM32H7 series
Add GPIO support on STM32H7.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Erwan Gouriou
ecd23f4fa3 dts: STM32H747 basic device tree description
Initiate stm32h7 device tree description, with stm32h747 single core
configuration.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-04 08:50:04 -04:00
Johann Fischer
fc57ea8d3c drivers: ssd1673: rename driver to ssd16xx
ssd1673 driver supports different controllers,
rename it to more generic ssd16xx.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2019-07-04 07:27:09 -04:00
Armando Visconti
72ae24d8d5 driver/sensor: lsm6dso: Add support
Add support to STM LSM6DSO 6-axis IMU sensor driver.
This driver supports communication with device though both
I2C and SPI bus and both polling and drdy trigger mode.

This driver supports also the sensorhub mode with the possibility
to connect a maximum of two external devices, typically a
magnetometer and an environmental sensor, currently selected among
following devices: lis2mdl magnetometer, lps22hh or lps22hb
pressure and temperature sensors, HTS221 humidity sensor.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2019-07-03 12:17:43 -05:00
Armando Visconti
9dbdd81abe driver/sensor: add LPS22HH sensor support
Add support to STM LPS22HH pressure and temperature sensor.
The driver support I2C and SPI bus communication and both
polling and drdy trigger mode.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2019-07-03 11:59:17 -05:00
Henrik Brix Andersen
56940ac239 soc: arm: nxp: ke1xf: add watchdog support
Add watchdog (WDOG32) support to the NXP Kinetis KE1xF SoC series.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-07-02 18:00:16 -05:00
Henrik Brix Andersen
7cb92552f3 drivers: watchdog: mcux_wdog32: add driver for the NXP Kinetis WDOG32
Add driver shim for the NXP Kinetis WDOG32 module.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-07-02 18:00:16 -05:00
Kumar Gala
799366a90c dts: silabs: fix gpio address
There are a few cases in which the reg address for the GPIO block was
wrong.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-07-02 18:40:53 -04:00
Kumar Gala
f7b0257773 dts: nios2: fix flash node name
Fix the flash node name to match the reg.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-07-02 18:38:23 -04:00
Kumar Gala
1453d0c468 dts: nxp_imx6sx_m4: fix cpu reg num
Fix reg of cpu node to match node name

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-07-02 17:36:18 -05:00
Kumar Gala
8859089d6c dts: lpc55s6x: Fix SRAM-X address
Fix the address SRAM-X is located at (0x1400_0000).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-07-02 17:35:27 -05:00
Loic Poulain
304c5fd196 dts: arm: nxp_rt: Add GPT nodes
i.MX RT chips have two GPT modules.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2019-07-01 11:53:07 -05:00
Piotr Zięcik
fb898e3532 dts: bindings: Add fixed-clock DTS binding
This commit adds binding for clock provider with fixed frequency.

Signed-off-by: Derek Hageman <hageman@inthat.cloud>
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-06-28 07:32:01 -05:00
Piotr Zięcik
ca8ca03c72 dts: bindings: Add bindings for ARM, ARC, Xtensa CPUs
This commit adds YAML files providing bindings for the
ARM, ARC and Xtensa CPUs.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-06-28 07:32:01 -05:00
Kumar Gala
12589d6b64 dts: remove unused clock-controllers property
The 'clock-controllers' property isn't specified and not used for any
generation.  Lets remove it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-28 07:23:31 -05:00
Kumar Gala
bb324616bd dts: remove unused clock-controller property
The 'clock-controller' property isn't specified and not used for any
generation.  Lets remove it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-28 07:23:31 -05:00
Kumar Gala
2c499a7363 dts/bindings: remove 'use-prop-name' from bindings
Now that the generation code doesnt look at 'use-prop-name' we can
remove it from the binding files.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-27 07:01:10 -05:00
Yannis Damigos
3748085d18 dts: intel_s1000: Move core_intc node under soc node
Move core_intc node under soc node

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-06-27 07:21:11 -04:00
Yannis Damigos
ae781bd9bd dts: Restructure xtensa dts directory
Restructure xtensa dts directory

Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
2019-06-27 07:21:11 -04:00
Ioannis Konstantelias
3ff4e52c7a dts: pinctrl: stm32l4: Add alternative USART3 pair
Added (rx: PC5, tx: PC4) as alternative USART3 pair.

Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
2019-06-27 07:19:38 -04:00
Alexander Wachter
14e31ba419 soc: nxp: k6x: Add CAN support
This commit adds CAN support for Kinetis K6x family.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2019-06-26 16:05:51 -05:00
Manivannan Sadhasivam
12faf11f75 dts: arm: st: mp1: Add missing uart4 and uart7 pinmux nodes
Add missing uart4 and uart7 pinmux nodes for STM32MP157 MPU.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-06-26 07:37:35 -04:00
Charles E. Youse
3dc7c7a6ea drivers/interrupt_controller/mvic.c: remove MVIC interrupt controller
The Quark D2000 is the only x86 with an MVIC, and since support for
it has been dropped, the interrupt controller is orphaned. Removed.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-25 08:06:43 -04:00
Charles E. Youse
c6c9dcf28c drivers/adc/adc_intel_quark_d2000: remove Quark D2000 ADC driver
Remove orphaned driver (Quark D2000 SoC no longer supported).

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-25 08:06:43 -04:00
Charles E. Youse
57b46bbc85 soc/x86/intel_quark: remove support for Quark D2000 SoC
Removed Quark D2000 SoC files and first-order related DT bindings.

A few config options have been moved from the CONFIG_* space to
the DT_* space, as they were defined in the D2000 Kconfig files
and "leaked" into the other Quark trees.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-25 08:06:43 -04:00
Henrik Brix Andersen
52cfe30d5e soc: nxp: ke1xf: add CAN support
Add support for the FlexCAN controllers found in the NXP Kinetis KE1xF
SoC series.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Henrik Brix Andersen
13847a315d drivers: clock_control: mcux_scg: add NXP MCUX SCG clock control driver
Add clock controller driver for the NXP Kinetis System Clock Generator
(SCG) clock module.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Henrik Brix Andersen
652fdfe3a1 drivers: can: add support for the NXP Kinetis FlexCAN controller
Add MCUX driver shim for the NXP Kinetis FlexCAN CAN bus controller.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Henrik Brix Andersen
dded1d076a dts: can: allow individual specification of prop seg and phase seg1 quanta
Allow individual specification of the time quanta used for the CAN bus
propagation segment and phase segment 1.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-06-24 14:33:46 -05:00
Kumar Gala
bf0f6d911d dts: Add concept of sub-nodes to YAML and generator
Several bindings have an expectation of sub-nodes that describe the
actual infomation.  The sub-nodes don't have any compatiable so we can't
key on that.

So we can add the concept of a sub-node to the YAML to handle cases like
'gpio-keys', 'gpio-leds', 'pwm-leds', etc..

The sub-node in the YAML is effective the "binding" params that describe
what properties should exist in the sub-node.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-21 15:34:28 +02:00
Kumar Gala
de3d808280 dts/bindings: Add binding for riscv,cpu-intc
The RISC-V CPU interrupt controller didn't have a binding.  Add a simple
one for it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-21 07:52:12 -05:00
Kumar Gala
0bed1007ed dts: cleanup missing #{address,size}-cells
A few i2c and spi bus nodes were missing #address-cells and #size-cells
properties.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-20 22:48:57 -05:00
Kumar Gala
e83b8c313b dts/bindings: Fix openisa,rv32m1-intmux binding
The binding specified 2 cells for an interrupt, but in reality we only
have an IRQ number.  Remove the 'pri' cell from the binding to match
what the dts files are doing.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-20 16:44:38 -05:00
Kumar Gala
b023fbf938 dts/bindings: Remove pinctrl from bindings
The pinctrl property in the bindings is meaningless, lets remove it and
add a proper pinctrl property when we are ready.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-19 15:53:24 -04:00
Ulf Magnusson
eba81c6e54 yaml: Remove redundant document separators
YAML document separators are needed e.g. when doing

  $ cat doc1.yaml doc2.yaml | <parser>

For the bindings, we never parse concatenated documents. Assume we don't
for any other .yaml files either.

Having document separators in e.g. base.yaml makes !include a bit
confusing, since the !included files are merged and not separate
documents (the merging is done in Python code though, so it makes no
difference for behavior).

The replacement was done with

    $ git ls-files '*.yaml' | \
        xargs sed -i -e '${/\s*\.\.\.\s*/d;}' -e 's/^\s*---\s*$//'

First pattern removes ... at the end of files, second pattern clears a
line with a lone --- on it.

Some redundant blank lines at the end of files were cleared with

    $ git ls-files '*.yaml' | xargs sed -i '${/^\s*$/d}'

This is more about making sure people can understand why every part of a
binding is there than about removing some text.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-06-19 10:40:10 +02:00
Ioannis Konstantelias
dfca5ab817 soc: stm32: Add STM32L496XE support
Added support for the STM32L496XE series with 512KB internal flash and
256KB SRAM of contiguous addresses.

Signed-off-by: Ioannis Konstantelias <ikonstadel@gmail.com>
2019-06-17 16:35:12 -04:00
Kumar Gala
6758e065ae dts/bindings: Cleanup phy bindings
* Fix white space in phy.yaml
* Fix property name in st,stm32-usbphyc.yaml and usb-nop-xceiv.yaml to
  use "#phy-cells" and not "phy-cells"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-16 10:09:51 -04:00