This commit introduces the ability to set the CAN
interface from command-line. This is helpful
if we want to run multiple instances of the app
with different CAN interfaces without making
separate compilations for each instance.
Signed-off-by: Kacper Dalach <dalachowsky@gmail.com>
The driver right now only allows inverting the input value, which can be
useful for differential channels but is quite confusing for single ended
ones. Implement a simple output inversion flag instead to make up for
that.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Updates dts files to use the same GPIOTE interrupt lines as NRFX
for zephyr when TF-M is used.
Signed-off-by: Vidar Lillebø <vidar.lillebo@nordicsemi.no>
In S32K1 devices, Arm Systick clock frequency is equal to the
CPU core clock frequency, and its value can be obtained from
devicetree.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Correct license identifiers in two files copied from internal Nordic
repositories that were not properly adjusted for Zephyr:
- dts/bindings/flash_controller/nordic,rram-controller.yaml (added in
commit 3a8ee7df91)
- dts/bindings/misc/nordic,nrf-dppic-local.yaml (added in commit
796d09d2a6)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This patch adds support for the rx-invert and tx-invert device-tree
properties to the uart_lpc11u6x driver for USARTs 1, 2, 3 and 4.
Note that this feature is not supported by USART 0.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
remove litex,sys-clock-frequency from litex,clk,
because we already define that in the clock-frequency of cpu0.
This can be accessed via
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
These properties are not used by the driver at all, but are
inconveniently marked as required. Lets just remove them.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
DTC warning caused by reg address not matching unit address,
but SRAM node address is translated by ranges property anyways.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The unit address didn't match reg which causes the warning, but
flexspi should be part of the peripheral node space anyways.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add new property 'nxp,reference-cells' for vref node.
Remove lpadc nodes 'nxp,reference-supply' property.
Add new property 'nxp,references' for lpadc nodes.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Add specifier cells for nxp vref, when some other
peripherals use the vref to provide reference voltage,
this cells can be used to pass-in vref target voltage.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Remove d0i1 and change threshold for d0i2 to 10ms for pm setting
according to the requirements to pass CTS for chrome projects.
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
According to the RV32M1 Series Manual, Rev 1.1 RV32M1 series supports the C
extension, and doesn't support the A extension. Apply fixes accordingly.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Currently imx8mm/n use pinctrl binding of nxp,imx8m-pinctrl.yaml which
is used for imx8mq series platforms, but imx8mm/n have different pinctrl
hardware module with imx8mq, so change imx8mm/n to use binding of
nxp,imx8mp-pinctrl.yaml as imx8mm, imx8mn and imx8mp have the same
pinctrl hardware module.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Add CANXL MRU handler, use the same RX, TX IRQ number.
Update the error priority that is lower priority than
the the tx_rx_mru priority incase the error interrupt
happens continuously, mru interrupt priority must be
higher to get report error counter. Otherwise the mru
interrupt can be delayed by error interrupt and
never call to MRU handler. This fixes#75022.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Fix the devicetree bindings to actually be used as the default
configuration, following the example set by various ST sensor devices.
This requires sadly dropping enums and using #defines for various
options as well as repeating many numbers, but presumably is the way to
do it given the precedent set by ST with sensors like the lsm6dso.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Add support for the EK RA8M1 board
This board is using Renesas RA8M1 MCU.
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
This is the initial commit to support for gpio driver
for RA8M1 MCU, the coding is base on renesas fsp hal
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Add initial support for the Cortex-M85 Core which is an implementation
of the Armv8.1-M mainline architecture.
The support is based on the Cortex-M55 support that already exists in
Zephyr.
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
This patch removes definitions of power domains from the ACE30 PTL DTS
file that do not exist in the actual hardware.
The following power domain nodes have been removed:
- 'ml1_domain' with a bit-position of <13>
- 'io3_domain' with a bit-position of <11>
- 'io2_domain' with a bit-position of <10>
These nodes were previously included in the DTS file but do not
correspond to any physical power domain in the ACE30 PTL hardware. Their
presence in the DTS could lead to confusion and misconfiguration, as the
software might attempt to interact with non-existent hardware features.
By removing these nodes, the DTS now accurately reflects the hardware
capabilities of the ACE30 PTL platform, ensuring that the power
management infrastructure within the firmware operates based on the
correct hardware configuration.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Remove the Audio Link Hub (ALH) nodes from the ACE 3.0 PTL DTS file.
This patch cleans up the Device Tree Source (DTS) for the ACE 3.0 PTL
platform by removing the definitions of the ALH DAI nodes. The ALH
interface is not utilized in the ACE 3.0 PTL architecture, making these
nodes redundant.
The following changes are made:
- Deleted the 'alh0' and 'alh1' nodes, which were previously defined
with FIXME comments indicating a problematic modeling of individual
ALH channels/instances using node labels.
This cleanup helps to prevent confusion and potential errors in device
configuration by ensuring that the DTS reflects the actual hardware
capabilities of the ACE 3.0 PTL platform.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Rearrange the power domain entries in the ACE30 PTL device tree source
file to be in ascending order according to their bit positions. This
reordering improves the readability of the device tree source by
grouping power domains logically according to their bit position within
the power management registers.
The changes in this patch include:
- Moving 'ml1_domain' and 'ml0_domain' to their correct positions
according to their bit-position values (13 and 12, respectively).
- Adjusting the order of 'io3_domain', 'io2_domain', 'io1_domain', and
'io0_domain' to reflect their bit positions (11, 10, 9, and 8).
- Placing 'hub_hp_domain' and 'hst_domain' at their new positions
according to their bit-position values (6 and 5).
No functional changes are introduced with this patch. It solely aims to
make the device tree source more intuitive and easier to navigate when
mapping power domains to their respective control bits.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This commit should deal with updating
the way USBD was handling the DMA
engine. Based on the #73803 request
DMA should be handled via the DMA
driver API class and not directly.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
Cleanup leading spaces found via the following regexes:
r" compatible ="
r"^ "
in:
zephyr/**/*.dts
zephyr/**/*.dtsi
Signed-off-by: Jordan Yates <jordan@embeint.com>
