Commit graph

8801 commits

Author SHA1 Message Date
Martí Bolívar
8285f2b04e dts: bindings: serial: fix up multi-line strings
Clean up multi-line strings so they will show up properly in the
bindings index in the HTML documentation.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-06-14 21:49:57 -04:00
Martí Bolívar
fb41046e9b dts: bindings: sensor: fix up multi-line strings
Clean up multi-line strings so they will show up properly in the
bindings index in the HTML documentation.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-06-14 21:49:57 -04:00
Martí Bolívar
73055c8592 dts: bindings: pinctrl: fix up multi-line strings
Clean up multi-line strings so they will show up properly in the
bindings index in the HTML documentation.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-06-14 21:49:57 -04:00
Martí Bolívar
51cfdbc45d dts: bindings: net: fix up multi-line strings
Clean up multi-line strings so they will show up properly in the
bindings index in the HTML documentation.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-06-14 21:49:57 -04:00
Martí Bolívar
b2732ec5be dts: bindings: mtd: fix up multi-line strings
Clean up multi-line strings so they will show up properly in the
bindings index in the HTML documentation.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-06-14 21:49:57 -04:00
Martí Bolívar
d6d9fe19dc dts: bindings: mmc: fix up multi-line strings
Clean up multi-line strings so they will show up properly in the
bindings index in the HTML documentation.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-06-14 21:49:57 -04:00
Martí Bolívar
74c985c934 dts: bindings: ieee802154: fix up multi-line strings
Clean up multi-line strings so they will show up properly in the
bindings index in the HTML documentation.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-06-14 21:49:57 -04:00
Martí Bolívar
aaa5e59c83 dts: bindings: gpio: fix up multi-line strings
Clean up multi-line strings so they will show up properly in the
bindings index in the HTML documentation.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-06-14 21:49:57 -04:00
Martí Bolívar
e18c9dfc58 dts: bindings: dma: fix up multi-line strings
Clean up multi-line strings so they will show up properly in the
bindings index in the HTML documentation.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-06-14 21:49:57 -04:00
Martí Bolívar
a43050059c dts: bindings: display: fix up multi-line strings
Clean up multi-line strings so they will show up properly in the
bindings index in the HTML documentation.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-06-14 21:49:57 -04:00
Martí Bolívar
6b8243d65a dts: bindings: cpu: fix up multi-line strings
Clean up multi-line strings so they will show up properly in the
bindings index in the HTML documentation.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-06-14 21:49:57 -04:00
Martí Bolívar
5a4b1d4dbd dts: bindings: can: fix up multi-line strings
Clean up multi-line strings so they will show up properly in the
bindings index in the HTML documentation.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-06-14 21:49:57 -04:00
Bhavesh Bhojwani
0507387a5b dts/arm: st: f1: Move CAN node add support for f103X8
Moved can, spi, usb, usb_fs_phy nodes to f103X8 dts.
Adds CAN for f103X8 series.
Tested on stm32f103c8 soc.
Tested on stm32f103vb soc.

Signed-off-by: Bhavesh Bhojwani <bhaavesh.bhojwaani@gmail.com>
2021-06-14 21:49:19 -04:00
Piotr Pryga
7b726ee379 dts: arm: nordic: nRF52820 add radio peripheral with DFE antenna config
Add radio peripheral to nrf52820 DTS. The peripheral description
includes antenna matrix congiuration for Direction Finding extennsion.

Appropriate binding file for nRF radio peripheral already egxists.

There is no default antenna matrix configuration. Antennas number
and GPIOS mapping to DFEGPIOS is project specific.
Complete configuration must be provided by end user as overaly.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2021-06-14 15:18:55 +02:00
Luc Viala
7105875ff4 driver/uart: add enum parity element on devicetree bindings
It helps configurations of the parity mode for uart interfaces

Signed-off-by: Luc Viala <lviala@zaack.io>
2021-06-11 08:53:10 -05:00
Tim Lin
8ea58d4389 ite: drivers/adc: create pinmux phandle to the ADC driver node
Create the pinmux phandle to the ADC driver node in the
devicetree. When the pinmux_pin_set function in
adc_it8xxx2_channel_setup can refer to the setting of
this phandle. It is more flexible to use.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-06-11 15:47:25 +02:00
Krishna Mohan Dani
bba5090b4d dts/arm: STM32: Adding DAC1 & DAC2 support for stm32f3 in dtsi
This commit adds DAC1 support in dtsi for stm32f3 series. Some
stm32f3 series has DAC2 so adding the same where applicable.

Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
2021-06-10 16:00:04 -05:00
Bhavesh Bhojwani
2510c89236 dts/arm: st: g0: closes parenthesis for soc
This commit adds a closing parenthesis for soc model of stm32g050.
Resolves issue #36014

Signed-off-by: Bhavesh Bhojwani <bhaavesh.bhojwaani@gmail.com>
2021-06-08 11:15:00 -05:00
Jose Alberto Meza
d86636fcdc dts: bindings: mchp: Convert vw_irq to array
Micropchip eSPI controller can generate 2 different IRQ for
virtual wires.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-06-07 23:52:17 -04:00
Jose Alberto Meza
164f2cdf1a dts: arm: mchp: Add missing eSPI interrupt
eSPI controller can generate another IRQ for extended/custom
virtual wires.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2021-06-07 23:52:17 -04:00
Mulin Chao
b674047004 dts: pcc: npcx: add ram-pd-depth property in npcx-pcc node
Since the valid bit-depth of RAM_PDn registers are different, this CL
introduces a 'ram-pd-depth' property in 'nuvoton,npcx-pcc' node if the
application needs to turn off the partial ram blocks for better power
consumption.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-06-07 12:07:36 +02:00
Julien Massot
81eb4f4ab3 dts: arm: rcar_gen3_cr7: add can0 node
Add can0 classic can node to the rcar_gen3_cr7 SoC series.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-06-07 12:06:21 +02:00
Julien Massot
02b788cd62 dts: bindings: can: Add support for Renesas R-Car
This is classic CAN bindings tested on Renesas R-Car
gen3 series.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2021-06-07 12:06:21 +02:00
Fabio Baltieri
5688e1c7e2 dts: stm32wl: add various device nodes
Add a few device nodes present in the stm32wl family.

Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
2021-06-07 12:04:15 +02:00
Armando Visconti
fcb0953309 drivers/sensor: lis2mdl: Add multi-instance support
Add multi-instance support and make use of the stmemsc i2c/spi
read/write routine that has been introduced to simplify the ST
sensor drivers code.

Moreover, move spi-full-duplex property from Kconfig inside Device
Tree, so that each LIS2MDL instance can be configured selectively
in accordance to how it is used in h/w.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2021-06-04 16:29:45 -05:00
Robert Szczepanski
ba56d751c0 drivers: gpio_litex: add support for changing IRQ type
LiteX GPIOIn module provides possibility to change IRQ mode
and edge via CSRs. This commit adds support for that feature.

Signed-off-by: Robert Szczepanski <rszczepanski@internships.antmicro.com>
2021-06-04 16:24:52 -05:00
Robert Szczepanski
639e1d1b36 drivers: gpio_litex: add support for disabling IRQs and update devicetree
This adds missing option to disable IRQs.
Devicetree is modified to match previous commit with custom IRQ CSR
addresses.

Signed-off-by: Robert Szczepanski <rszczepanski@internships.antmicro.com>
2021-06-04 16:24:52 -05:00
Robert Szczepanski
cf385b0a15 drivers: gpio_litex: add support for litex_vexriscv GPIO interrupts
This commit adds support for GPIO interrupts in GPIO driver for Litex
SoC Builder.

Signed-off-by: Robert Szczepanski <rszczepanski@internships.antmicro.com>
2021-06-04 16:24:52 -05:00
Ruibin Chang
8482b9a1a8 ITE dts/riscv/it8xxx2.dtsi: add ecpm node for it8xxx2
Add EC clock and power management (ecpm) node for it8xxx2.

Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
2021-06-04 16:16:57 -05:00
Mulin Chao
d8e5da00d0 dts: npcx: add device-tree files of npcx9 series.
Add device-tree files for npcx9 series such as npcx7m3f and npcx7m6f in
the following folder chart.

dts/arm/nuvoton
    |--npcx
    |    |--npcx7
    |    |    |--npcx7-miwus-wui-map.dtsi
    |    |    |--npcx7-alts-map.dtsi
    |    |    |--.....
    |    +--npcx9
    |    |    |--npcx9-miwus-wui-map.dtsi
    |    |    |--npcx9-alts-map.dtsi
    |    |    +--.....
    |    |--npcx-miwus-wui-map.dtsi
    |    |--npcx-alts-map.dtsi
    |    |--.....
    |
    |--npcx.dtsi
    |--npcx7.dtsi
    +--npcx9.dtsi

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-06-04 16:14:48 -05:00
Mulin Chao
a9366c76e8 dts: npcx: arrange device-tree files of npcx7 series.
Arrange device-tree files of npcx7 series by following steps:

1. Move device-tree declarations of npcx family to npcx.dtsi.
2. Leave specific device declarations of npcx7 series to npcx7.dtsi.
3. Move chip series related mapping tables such as
   npcx7-miwus-wui-map.dtsi and so on to npcx/npcx7 folder.
4. Move common device-tree declarations used in each npcx series to
   npcx-miwus-wui-map.dtsi and so on to npcx folder.

Then, the npcx device-tree folders are arranged to:

dts/arm/nuvoton
    |--npcx
    |    |--npcx7
    |    |    |--npcx7-miwus-wui-map.dtsi
    |    |    |--npcx7-alts-map.dtsi
    |    |    |--.....
    |    |--npcx-miwus-wui-map.dtsi
    |    |--npcx-alts-map.dtsi
    |    |--.....
    |
    |--npcx.dtsi
    |--npcx7.dtsi

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-06-04 16:14:48 -05:00
Mulin Chao
a8a217f22d dts: npcx: replace series-prefix 'npcx7-' with famliy-prefix 'npcx-'
This CL replaces series-prefix "npcx7-" with family-"npcx-" for npcx dts
nodes such as 'espi-vws-map' and 'miwus-int-map'. Since we plan to
introduce the npcx9 and later series, adding a new node such as
npcx9-espi-vws-map for each series is more complicated and not
necessary.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-06-04 16:14:48 -05:00
Alexander Kozhinov
1de0b49212 dts: arm: st: f4: stm32f4: dtsi: add gpio ports f and g
add additional gpio ports according to RM0390 Rev 6 p.58

Co-authored-by: Erwan Gouriou <erwan.gouriou@linaro.org>

Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2021-06-04 16:12:24 -05:00
Kumar Gala
5fcbe5e099 dts: arm: nxp: Add port property to nxp,lpc-gpio nodes
Add a port property to describe which hardware port a GPIO device node
is describing since we can't tell from the registers (as the registers
are interleaved in the same MMIO space).

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-05-31 17:45:05 +02:00
Henrik Brix Andersen
eb9cf9e0dc soc: arm: nxp: kinetis: k2x: remove MPU support
Remove (disabled) MPU support for the NXP Kinetis K2x. At least the
MK22F51212, which is the only K2x supported by Zephyr so far, does not
contain an MPU.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-05-26 18:14:03 -05:00
Piotr Mienkowski
a323a41fc2 sensor: qdec_sam: use compatible atmel,sam-tc-qdec
Change the drivers's compatible from atmel,sam-tc to atmel,sam-tc-qdec.
The atmel,sam-tc should be reserved for the future counter driver.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2021-05-26 18:13:10 -05:00
Piotr Mienkowski
80ad300b6c dts: same70: use lower case letter in tc0 reg address
The change removes the following warning:
Warning: /soc/tc@4000C000: simple-bus unit address format error,
         expected "4000c000"

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2021-05-26 18:13:10 -05:00
Anas Nashif
dde1a2126f nios2: max10: fix uart0 base register
Fix register for uart0.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-05-26 18:09:47 -05:00
Arvin Farahmand
d1d494e2b7 drivers: flash: bugfix: set atmel SAM0 write-block-size
`write-block-size` property in multiple Atmel SAM SoCs was either
missing or set incorrectly.

Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
2021-05-25 11:59:45 -05:00
Martí Bolívar
b6fbc20de4 dts: add 'linaro,' prefix to 96b-lscon-1v8, 96b-lscon-3v3
These compatibles don't match the dt-schema regular expression for
compatible properties that we'd like to support in Zephyr because they
do not begin with a letter.

Use linaro, as a vendor prefix to make them compliant. Update the
release notes since out of tree users will need to keep up.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-05-19 22:18:25 -05:00
Simon Guinot
1adbe8b65f dts: bindings: fix label properties for gpio-leds node
This patch adds a label property to the GPIO LED parent node and fixes
the label property description of the child node. Indeed it is the label
of a parent node which can be used as device_get_binding() parameter to
retrieve the LED device, and not the one of a child node.

In addition, this patch sets both this properties as not required
because they are not.

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2021-05-19 11:56:01 +02:00
Simon Guinot
0530ece6b8 dts: bindings: fix label properties for pwm-leds node
This patch adds a label property to the PWM LED parent node and fixes
the label property description of the child node. Indeed it is the label
of a parent node which can be used as device_get_binding() parameter to
retrieve the LED device, and not the one of a child node.

Fixes #34275

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2021-05-19 11:56:01 +02:00
Rico Ganahl
925303ede6 dts: stm32mp1: SPI2 mixup with SAI2, SPI3 mixup with SAI3
Device Tree address mixup between
SAI2 <-> SPI2 and SAI3 <-> SPI3

Add functionality to SPI2/3
Tested on SPI2

Signed-off-by: Rico Ganahl <rico.ganahl@bytesatwork.ch>
2021-05-18 11:19:30 -05:00
Aurelien Jarno
869d252942 dts: arm: stm32f{2,4,7}: fix device tree warning
Switch the interrupt controller address to lower case to avoid this
warning:

  stm32f723e_disco.dts.pre.tmp:97.39-102.5: Warning (simple_bus_reg):
  /soc/interrupt-controller@40013C00: simple-bus unit address format
  error, expected "40013c00"

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2021-05-17 09:52:27 -05:00
Tim Lin
f66cb34b13 dts: riscv: it8xxx2: fix default status of UART
The default status of UART should set disabled.
If UART needs to enable, it will be set in the
dts of board level.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-05-12 13:01:56 -05:00
Andrzej Głąbek
797aa8b85a soc: nrf9160: Remove incorrect indication of SWO availability
Serial Wire Output functionality is not implemented in nRF9160.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-05-11 13:00:20 -05:00
Eug Krashtan
05d798e3a9 drivers: sensor: STM32 die temperature driver
STM32 internal temperature sensor driver.
This sensor can be used to measure the temperature of the CPU
and its surroundings.

Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
2021-05-08 10:18:09 -05:00
Saurabh Jagdhane
eb205ebe68 boards: arm: Enable FlexSPI driver on mimxrt685_evk.
Enable FlexSPI NOR flash driver with XIP build options.
Configure FlexSPI pins, update board documentation.
Add FlexSPI NOR flash dts node for mimxrt685_evk.

Enable flash storage by adding partition to dts file.
Using last 1MB for storage, and reserving 63MB for code.

Signed-off-by: Saurabh Jagdhane <saurabh.jagdhane@nxp.com>
2021-05-07 15:44:19 -05:00
Eug Krashtan
793e2c1891 drivers: flash: at45: Add Reset and WP pins
Adding Reset and Write-protect pins initialization during AT45 driver
start-up. Usually these pins are driven high when not used.
The AT45 device incorporates an internal power-on reset circuit, so
there is no initial on-off reset sequence.

Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
2021-05-07 14:57:08 -05:00
Alexander Wachter
94f85241aa dts: arm: stm32g4: add can bindings to stm32g4 SoCs
This commit adds the CAN nodes to the STM32g4 SoCs.

Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
2021-05-07 12:36:10 -05:00