Commit graph

11,885 commits

Author SHA1 Message Date
Andy Sinclair
04e18f093f drivers: regulator: Added startup and off/on delay to common driver
A configurable delay during regulator switch on is currently
only supported by the GPIO and fixed regulator drivers.

This functionality has been moved to the common driver, so it can
be easily added to any regulator driver.

Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
2023-11-13 21:30:10 +00:00
Jeppe Odgaard
128f80db7d dts: bindings: add explorir_m support
Add bindings for the ExplorIR-M CO2 sensor.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2023-11-13 12:14:08 -05:00
Jeppe Odgaard
dcf882af03 dts: bindings: Add gss vendor prefix
Add vendor prefix for Gas Sensing Solutions Ltd.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2023-11-13 12:14:08 -05:00
Chekhov Ma
4e99da8599 imx93: change ccm driver to "imx-ccm-rev2"
i.MX93 share similiar register layout with i.MX RT11xx. Change ccm driver
to align with i.MX RT11xx, and make it easier to enable other drivers.

Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
2023-11-13 10:51:12 -06:00
Lucas Denefle
f9d0a4c5cf drivers: modem: add Quectel EG25-G
This commit introduces support for the modem EG25-G from Quectel.

Signed-off-by: Lucas Denefle <lucas.denefle@converge.io>
2023-11-13 10:10:15 -06:00
Armando Visconti
f1f7e4712c drivers/sensor: add support to LPS22DF pressure sensor
The LPS22DF is an ultracompact, piezoresistive, absolute pressure sensor
that functions as a digital output barometer. The LPS22DF provides lower
power consumption, achieving lower pressure noise than its predecessor.
This driver is based on stmemsc HAL i/f v2.3

https://www.st.com/en/datasheet/lps22df.pdf

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2023-11-13 16:08:46 +00:00
Anisetti Avinash Krishna
d6ff5122fd dts: x86: intel: raptor_lake: Remove unavailable UARTs
Remove unavailable UART instances on RPL platform.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-11-13 10:06:13 -06:00
Dominik Kilian
28df44946f ipc: add dynamically allocated buffers to icmsg
The icmsg and icmsg_me backends has limitations in context of
concurrent access to single instance. Some limitations are:
* sending by more thread at the same time may cause -EBUSY
* allocating TX buffer will cause errors in other threads that want
  to allocate before first thread sent the message,
* during no-copy receive, when RX buffer is on hold receiving is
  totally blocked.
This backend resolves those limitations by adding dynamically allocated
buffers on shared memory next to ICmsg circular buffer. The data is
passed using those buffers, so concurrency is not a problem. The ICmsg
is used only to pass short 2-byte messages containing references to
those buffers. The backend also supports multiple endpoint.
The ipc/icmsg_me sample was modified to support this backend.

Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no>
2023-11-13 11:11:43 +01:00
Bartosz Bilas
39eb124c81 drivers: add MAX20335 charger driver
Add a MAX20335 MFD subdriver for the built-in
battery charger.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2023-11-13 09:48:33 +01:00
Chris Friedt
c0064f1de8 logging: uart: support multiple instances
Extends the log_backend_uart to support logging to multiple
UART instances.

Signed-off-by: Christopher Friedt <cfriedt@meta.com>
2023-11-13 09:47:06 +01:00
Fabio Baltieri
9439c816e9 input: split npcx generic keyboard code into input_kbd_matrix.c
Move all the generic code from the Nuvoton NPCX keyboard scanning driver
into input_kbd_matrix.c. While doing that convert few configs into
devicetree properties and tweak few other things to enable the generic
code to support multiple instances.

This is limited to 8 rows for now, and that's fine for all the current
in-tree drivers, the limit could be removed down the road but this
should be fine for now, added few generic build checks to make sure a
driver does not go over the limit, as well and some more implementation
specific checks.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-11-13 09:45:28 +01:00
Ethan Duckett
da4e3e713b drivers: adc: ltc2451: Add ltc2451 driver
Adds support for the Linear Technologies LTC2451 ADC.

Signed-off-by: Ethan Duckett <ethan.duckett@brillpower.com>
2023-11-13 09:43:05 +01:00
Declan Snyder
2d1fdb5586 soc: nxp: rt1xxx: Enable NXP FlexRAM
Enable NXP FlexRAM in DTS and SOC code.

Do not configure flexram at runtime if the code is in the RAM.

Fix RT1060 DT to be more accurate.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-13 09:42:28 +01:00
Declan Snyder
71b0db2118 dts: bindings: Add nxp,flexram binding
Add binding for NXP FlexRAM

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-13 09:42:28 +01:00
Daniel Schultz
474bbd12e9 dts: arm: ti: am62x_m4: Add gpio0 node
The M4F subsystem has a dedicated GPIO controller with 24 available
pins. Add the node definition for the recently added driver.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2023-11-13 09:42:11 +01:00
Daniel Schultz
fbd2b84e0e drivers: gpio: davinci: Add pinctrl
Add pinctrl to the Davinci GPIO driver to allow muxing pins dirctly
in this driver.

Also aligned the macro backslashes as line continuation character at
the end of each line with each at the same position and removed the
GPIO_DAVINCI_DEVICE_INIT macro which seems to be not used.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
2023-11-13 09:42:11 +01:00
Adrian Bonislawski
155f866ecc dts: intel_adsp: ace remove dw watchdog
DW watchdog driver is not used on ACE,
Intel ADSP watchdog driver will be used in DTS when ready to use

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2023-11-10 16:22:34 -05:00
Antoniu Miclaus
678b29386d dts: bindings: adxl367: add interrupt support
Add int1-gpios property in the adxl367 dts bindings.

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
2023-11-10 10:44:11 -06:00
Fabio Baltieri
7a3a6d0c03 input: convert ite_it8xxx2_kbd driver from kscan to input
Convert the ITE keyboard scanning driver from kscan to input, add the
corresponding kscan compatibility node to the current board, build test
only.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-11-10 16:30:37 +00:00
Nick Kraus
5bd18886e9 sam: mdio: Fix Transfer Timeout at Initialization
Initialize the MDIO peripheral clock (normally done during GMAC
initialization) before trying any MDIO transfers, preventing startup
errors.

Signed-off-by: Nick Kraus <nick@nckraus.com>
2023-11-10 10:42:26 +01:00
Declan Snyder
fef0018cca soc: lpc55xxx: Support, enable, test NXP MRT
Support NXP MRT on LPC55XXX SOC series, enable on
lpcxpresso55s69_cpu0, add test overlay to counter basic api test

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-10 10:40:54 +01:00
Declan Snyder
93c59793c2 soc: rt6xx: Add NXP MRT
Add NXP MRT to RT6xx DT definition and add peripheral reset to soc.c

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-10 10:40:54 +01:00
Declan Snyder
ff83745c9a soc: rt5xx: Enable NXP MRT
Enable NXP MRT on RT5xx soc and MIMXRT595_EVK board

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-10 10:40:54 +01:00
Declan Snyder
0b5e48985d dts: bindings: Add binding for NXP Multirate Timer
Add binding for nxp,mrt and nxp,mrt-channel. MRT is
NXP multirate timer, a simple timer with multiple
independent channels.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-10 10:40:54 +01:00
Manuel Argüelles
1572ea16fc drivers: can: nxp_s32_canxl: use instance-based DT macros
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.

The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the driver's ISR within the shim
driver itself.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
2023-11-09 18:22:01 +01:00
Laurentiu Mihalcea
5cdd377316 boards: xtensa: nxp_adsp_imx8(x): Add serial support
This commit introduces all changes necessary for utilizing
the serial interface on i.MX8QM/QXP.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-11-09 18:21:05 +01:00
Laurentiu Mihalcea
dcddb2e0f7 dts: xtensa: nxp_imx8: Add dummy interrupt controller node
Since the LPUART peripheral DTS binding requires the
"interrupts" property be specified even if it's not going
to be used for now we need to add a dummy interrupt controller
node to make that possible. Logically speaking, this dummy
interrupt controller should be used by peripherals which
can assert interrupts directly routed to the DSP.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-11-09 18:21:05 +01:00
Laurentiu Mihalcea
707759bd12 soc: xtensa: imx8: Add pinctrl support
This commit introduces support for pinctrl-related operations
on i.MX8QM/QXP.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-11-09 18:21:05 +01:00
Laurentiu Mihalcea
ea99578b76 soc: xtensa: imx8: Enable clock control on i.MX8QM/QXP
This commit enables clock control on the i.MX8QM and QXP boards.
This is achieved through the following changes:
	1) The "reg" property is no longer marked as required
	for the "nxp,imx-ccm" binding. This is necessary because
	in the case of i.MX8QM and i.MX8QXP the clock management
	is done through the SCFW, hence there's no need to access
	CCM's MMIO space (not that you could anyways).

	2) The DTS now contains a scu_mu node. This node refers
	to the MU instance used by the DSP to communicate with
	the SCFW.

	3) The CCM driver needs to support the LPUART clocks
	(which will be the only IP that's supported for now)
	and needs to perform an initialization so that the
	NXP HAL driver knows which MU to use to communicate
	with the SCFW.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-11-09 18:21:05 +01:00
Lukasz Majewski
12665a0dc1 driver: eth: Support for lan8651 T1S ETH
This patch set provides support for T1S ethernet device - LAN8651.

For SPI communication the implementation of Open Alliance TC6
specification is used.

The driver implementation focuses mostly on reducing memory footprint,
as the used SoC (STM32G491) for development has only 32 KiB RAM in total.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2023-11-09 15:35:01 +01:00
Declan Snyder
345f079e49 dts: bindings: Fix NXP USB bindings
NXP USB bindings were combined into one binding and using
a property corresponding to HAL enums which is improper use
of devicetree.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-11-09 15:34:39 +01:00
Ayush Singh
2b98b67109 dt-bindings: i2c: Add gpio-i2c-switch
Generic GPIO enabled analog switch to isolate devices from an I2C bus

Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
Signed-off-by: Ayush Singh <ayushdevel1325@gmail.com>
2023-11-09 15:33:54 +01:00
Andy Sinclair
488f56c033 drivers: regulator: npm1300: soft start configuration
Added configuration of soft start functionality

Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
2023-11-09 15:32:17 +01:00
William MARTIN
56395ec42f dts: arm: st: Update stm32l496.dtsi
Add missing master-can-reg into stm32l496.dtsi

Signed-off-by: William MARTIN <william.martin@muxen.fr>
2023-11-09 11:22:48 +01:00
Emil Obalski
eb4fc3f083 ipc: backends: Port IcMsg based backends to use pbuf
Replace spsc_pbuf with pbuf implementation dedicated to
be used by IcMsg based backends.
The pbuf is written on top of simple read/write semantics
with minimal footprint and code complexity

Signed-off-by: Emil Obalski <Emil.Obalski@nordicsemi.no>
2023-11-09 10:18:37 +00:00
Antoniu Miclaus
fbee62d9e3 dts: bindings: adxl372: move int1-gpios to common
The `int1-gpios` property is common for both spi and i2c
implementations of adxl372. Therefore move it to
`adi,adxl372-common.yaml`

Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
2023-11-09 10:17:51 +00:00
Ioannis Karachalios
dd1371da8b dts: renesas: smartbond: Support the DMA engine.
Update DTS and board configurations to support the DMA accelerator.

Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
2023-11-09 10:17:29 +00:00
Ioannis Karachalios
546a640657 drivers: dma: smartbond: Support DMA accelerator.
Add support for the DMA engine.

Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
2023-11-09 10:17:29 +00:00
Gustavo Silva
b4625d6f13 drivers: sensor: add tsl2561 basic support
Add basic support for ams TSL2561 light sensor. Triggers, attributes
and manual integration time are currently not supported.

Signed-off-by: Gustavo Silva <gustavograzs@gmail.com>
2023-11-09 10:16:51 +00:00
Fabio Baltieri
9bb44b8e5f dts: arm: st: set flash size for stm32l011X4
This device lost the reg property since 88c9d1fbaf, causing the
nucleo_l011k4 board to not build anymore. Add it back, 512 bytes should
be the right number for this chip.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-11-09 09:09:22 +01:00
Tobias Pisani
ec202d852f drivers: sensor: bq274xx: Configure or confirm chemistry profile
Both the BQ27421 and BQ27427 have a few preset Chemistry profiles.
For the BQ27421 there exists three variants of the IC, and for the BQ27427,
it can be configured. The chemistry profile among other things includes the
taper voltage, which is used to detect charge termination.

This adds an optional `chemistry-id` config option to the driver. On the
BQ27421, it will confirm that the correct variant of the IC is mounted,
and on the BQ27427, it will configure it with the correct value.

Side note: The reference manual for the BQ27427
(https://www.ti.com/lit/ug/sluucd5/sluucd5.pdf) currently contains some
errors and inconsistencies regarding these registers. The table on page 7
appears to be correct.

Signed-off-by: Tobias Pisani <topisani@hamsterpoison.com>
2023-11-08 11:55:52 -06:00
Erwan Gouriou
9e74efd159 dts: stm32wba: Add rtc node
Add RTC node for stm32wba series.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-11-08 15:11:27 +00:00
Nazar Palamar
4fd732a738 drivers: wifi: added Infineon AIROC WIFI driver
Added initial version of Infineon AIROC WIFI  driver

Added initial version of binding file for Infineon AIROC WIFI
driver

Rename CONFIG_ABSTRACTION_RTOS_COMPONENT_ZEPHYR to
CONFIG_USE_INFINEON_ABSTRACTION_RTOS

Exclude cy8cproto_062_4343w platform from
drivers.modem.esp_at.build test

Change revision hal_infineon to
69c883d3bd9fac8a18dd8384624b8c472a68d06f

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2023-11-08 15:07:37 +00:00
Nazar Palamar
1fd080b8cf drivers: sdhc: added Infineon CAT1 SDHC/SDIO driver
Added initial version of Infineon CAT1 SDHC/SDIO driver

Added initial version of binding file for Infineon CAT1 SDHC/SDIO
driver

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2023-11-08 15:07:37 +00:00
Tim Lin
f1dc11174c ITE: drivers/i2c: Add a property for I2C located channel
Add a property for I2C channel switch selection. This property will
write to the SMBxxCHS register according to the I2C node you selected,
which can make channel swapping.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-11-08 10:08:28 +01:00
Bartosz Bilas
2c09999d24 drivers: dac: add driver for AD5592
Add MFD subdriver for the built-in DAC controller
in AD5592 chip.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2023-11-08 10:07:41 +01:00
Bartosz Bilas
0689d3dc11 drivers: gpio: add driver for AD5592
Add MFD subdriver for the built-in GPIO controller
in AD5592 chip.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2023-11-08 10:07:41 +01:00
Bartosz Bilas
ad3c5a27b4 drivers: adc: add driver for AD5592
Add MFD subdriver for the built-in ADC controller
in AD5592 chip.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2023-11-08 10:07:41 +01:00
Bartosz Bilas
9bdff044f0 drivers: mfd: add AD5592 MFD driver
This commit introduces a driver for
Analog AD5592 8-channel, configurable ADC/DAC/GPIO chip.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2023-11-08 10:07:41 +01:00
Aaron Ye
0e827e3598 dts: arm: ambiq: Add clock control instances to Apollo4 Blue Plus SoC.
This commit instantiates the clock control for Apollo4 Blue Plus.

Signed-off-by: Aaron Ye <aye@ambiq.com>
2023-11-07 09:42:25 +01:00