Add timer instance in device tree
Add timer yaml file
Timer0/1/2/3 are common for MAX32xxx MCUs
MAX32655 has additional Timer4/5 which are low power timers
Co-authored-by: Mert Vatansever <mert.vatansever@analog.com>
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
Add information to the device tree if UARTE instance has a HW feature
which is the ENDTX_STOPTX short.
Add this property to all instances in nrf54hl15, nrf54l20, nrf9280
and nrf54h20.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
we have four i2C peripherals .
- three shared between stm32u031/73/83
- One between stm32u073/83
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
There are numbers of drivers for different PCA(L) series chip. They
share similiar register layout and control logic. This driver intends
to unify these drivers for PCA(L)xxxx series i2c gpio expanders.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
Implement an option manual reset of the PCAL64XXA to allow the external
implementation of a retention of the port expander state.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Adds a new DTS prop for i3c devices as support for the CCC SETAASA
requires prior knowledge of the target if it supports it according
to i3c spec v1.1.1 section 5.19.3.23.
This will be used as an optimization for bus initialization.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Set a default value for constant-charge-voltage-max-microvolt, matching
the device hardware default, this ensure compatibility with existing
applications that did not specify the recently introduced property.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add general purpose partition tables to prevent
putting copied version of the same table into the
every ESP32 board dts.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Add all the necessary files to add apds9253 Avago sensor driver.
Sensor available at https://docs.broadcom.com/doc/APDS-9253-001-DS
Signed-off-by: Margherita Milani <margherita.milani@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
This reverts commit 518de763a6.
This commit switched nrf5340 devices to use the icbmsg
IPC backend.
Unfortunately this backend is not currently supported
in the nrf5340bsim target (it is not properly configured)
which results in a segfault during its initialization.
As this issue is currently blocking CI for all BT development
in Zephyr, let's revert this provisionally while we add
support for it.
See
https://github.com/zephyrproject-rtos/zephyr/issues/78099
for more info.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add new binding and a node to nrf54h20. Update Kconfig and nrfx_config
to include nrfx_tbm driver when node with that compatible is enabled.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
The current driver contains assembly code which is specific for the nRF51
SOC which makes it incompatible with other SOC's. This patch adds support
for other nRF SOC's as well. The timing is calucated based on the CPU clock
frequency, but can be configured manually as well if needed.
Changes have been verified on a Adafruit Feather nRF52840 Express board,
which contains a single NeoPixel RGB LED. Timings have been verified using
a scope connected to the WS1812 data line.
Signed-off-by: Chaim Zax <chaim.zax@zaxx.pro>
Added XGMAC0, XGMAC1, XGMAC2 device nodes in
intel_socfpga_agilex5 dts file with default
parameter values and default device node status
as 'disabled'.
Signed-off-by: Santosh Male <santosh.male@intel.com>
Devicetree binding for NXP mcxc oscillator is not available.
Add the binding to be able to configure the oscillator in devicetree.
Signed-off-by: Michal Smola <michal.smola@nxp.com>
Add configuration settings for the FOPT, FSEC, and flash configuration
offset to the FTFA module binding.
Signed-off-by: Michal Smola <michal.smola@nxp.com>
Charging a battery has three phases (compare Figure 8-2 in
https://www.ti.com/lit/ds/symlink/bq25180.pdf)
First is a pre-charge phase, then a constant current, then a constant
voltage phase.
During the pre-charge phase, the battery is only charged with a very low
current, to not damage the cells, because they are below a threshold,
that is considered healthy for the battery and need to be brought back
up to a healthy voltage.
Signed-off-by: Fabian Pflug <fabian.pflug@grandcentrix.net>
The linear battery charger will charge the connected battery up
to a specific voltage. This is different depending on the chemistry
of the battery. Most LiPo Batteries have a nominal voltage of 4.2V,
which is why the default voltage of the bq25180 is 4.2V.
Signed-off-by: Fabian Pflug <fabian.pflug@grandcentrix.net>
Add bindings for nrf-fll16m and nrf-lfclk and update in-tree nodes
and boards to use them in place of the fixed-clock binding.
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
The HFXO and LFXO oscillators have properties which need to be
specified in the devicetree. These properties are used by clock
controllers, which get these properties from the devicetree.
The BICR also contains these properties. For now, the properties
are duplicated in the bicr node in the devicetree.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
Add references to clock controllers so users can obtain
those for particular peripherals with DT macros like
DT_CLOCK_CTRL()
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Bjarki Arge Andreasen <bjarki.andreasen@nordicsemi.no>
U-Blox LARA-R6 was added to modem_cellular, and an additional state
was introduced where the UART baudrate is changed if the modem supports
it
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
The STM32 SPI driver, `spi_ll_stm32.c`, reads the clock frequency via
`clock_control_get_rate()`. The first `clocks` index is used as subsystem
argument if there is no second index, but this is not the source clock for
SPI 1, 2, and 3.
This causes the prescaler value calculation to be incorrect, resulting in a
frequency potentially above the `spi-max-frequency` value.
Add clock source for SPI instances 1, 2 and 3, that matches the default
clock configuration register reset value, which resolves the issue.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
since stm32h7.dtsi is already include in st/h7/stm32h743.dtsi
we don't need to include here again.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
