Commit graph

25,525 commits

Author SHA1 Message Date
Kate Wang
90c0af2018 drivers: clock_control: update clock_control_mcux_syscon driver for RT700
Update pixel clock control to support RT700.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-04-23 10:03:42 +02:00
Kate Wang
d628bfc148 drivers: mipi_dsi: dsi_mcux_2l: Use NXP DCNano DBI driver for memory write
There is no smartdma on RT700, so to perform DCS memory write the CPU has
to write APB buffer word by word, which is too slow for most applications.
But the DCNano in DBI mode can be used to interface with the MIPI-DSI on
RT700, and send data to MIPI-DSI to transfer, once it is properly
configured, which solves the issue.
First added new parameter first_write in display_buffer_descriptor to let
NXP DCNano DBI driver know to use MIPI_DCS_WRITE_MEMORY_START or
MIPI_DCS_WRITE_MEMORY_CONTINUE.
Second updated the MCUX MIPI-DSI driver to support using the NXP DCNano DBI
driver for memory write.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-04-23 10:03:42 +02:00
Kate Wang
0017bfcedc drivers: mipi_dbi: introduce NXP DCnano driver
Introduce NXP NCNano driver using MIPI DBI class. This peripheral
supports 8080 and 6800 mode. The driver also supports used with
nxp,mipi_dsi_2l driver, for the panel with DPHY bus, such as g1120b0mipi.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-04-23 10:03:42 +02:00
Kate Wang
058a162baf drivers: display: Update nxp,dcnano-lcdif to support IP change on RT700
Update nxp,dcnano-lcdif to support IP change on RT700. There are extra
registers need to be configured for the lcdif on RT700. Add new binding
item "version" to tell which version of the IP the SoC has.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-04-23 10:03:42 +02:00
Kate Wang
ed63240804 drivers: display: Fix typo in kconfig comment of nxp,dcnano-lcdif.
Should be DISPLAY_MCUX_DCNANO_LCDIF instead of DISPLAY_MCUX_ELCDIF.

Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
2025-04-23 10:03:42 +02:00
Jilay Pandya
82c6add9b1 drivers: stepper: gpio: refactor work rescheduling logic
update remaining steps should just update the remaining steps, rescheduling
should happen after updating steps and hence is moved to position mode task
which is also in coherence with velocity mode task

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-04-23 02:16:19 +02:00
Luis Ubieda
0a4d86c557 sensor: icm45686: Add I2C bus support
Validated for read/decode APIs, as well as Streaming mode (FIFO).

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-04-23 02:15:34 +02:00
Luis Ubieda
b22299d262 sensor: icm45686: Rename REG_SPI_READ_BIT to REG_READ_BIT
So it's generic irrespective to the bus. Tested for I2C and SPI.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-04-23 02:15:34 +02:00
Matt Ihnen
132289ec33 drivers: entropy: stm32: fix compile errors for STM32L4 series
The low level function names in the stm32l4xx low level driver are
different than all the other stm32's even though the functionality is the
same. This breaks the entropy module for these parts. This patch fixes the
build and has been tested on a custom stm32l4p5 board.

This STM32CubeL4 issue has been reported (ST Internal Reference: 207828).

Fixes: https://github.com/zephyrproject-rtos/zephyr/issues/88621

Signed-off-by: Matt Ihnen <matt.ihnen@gmail.com>
2025-04-22 16:54:52 +02:00
Sai Santhosh Malae
0d547d4e8a drivers: dma: siwx91x: SRAM desc alignment bug fix
Addressed an issue where alignment of dma desc varaible
of dma0 is corrected to 1024 instead of 512.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-04-22 16:54:11 +02:00
Sai Santhosh Malae
19e4c56e23 drivers: dma: siwx91x: Bug fix for regular DMA transfers
Addressed an issue where regular/non-scatter-gather DMA
transfers were not explicitly using the primary DMA descriptor
structure. This ensures a smooth regular DMA transfer after
any scatter gather transfer.

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-04-22 16:54:11 +02:00
Sai Santhosh Malae
a7c06773fe drivers: dma: siwx91x: distinguishing mem to mem transfers
Introduced a new variable in the `dma_siwx91x_channel_info`
structure to provide a clean way to differentiate transfer
directions. This enhancement is utilized to trigger software
requests specifically for memory-to-memory transfers

Signed-off-by: Sai Santhosh Malae <Santhosh.Malae@silabs.com>
2025-04-22 16:54:11 +02:00
Josuah Demangeon
0b2d45595e drivers: video: hotfix: force use of constant value for 'source_dev'
In Clang 16 run with some flags, the compiler does not accept a static
const variables as struct initializer. This caused build errors in only
some contexts. Always use the devicetree macros to access the source
device node as a workaround.

Signed-off-by: Josuah Demangeon <me@josuah.net>
2025-04-22 15:04:47 +02:00
Simon Gilbert
5c04df9127 i2c: stm32: add DMA callback stubs to avoid nullptr calls in ISR context
Add stub functions for the I2C DMA callbacks, which are invoked
during or upon completion of DMA-based I2C transactions. Without
these, NULL pointer calls occur on DMA transfer complete or error
events, leading to faults within ISR context.

Signed-off-by: Simon Gilbert <srdgilbert@gmail.com>
2025-04-22 15:04:11 +02:00
Simon Gilbert
4348be608d i2c: stm32: add missing DMA configuration fields
Add missing fields for DMA tx and rx configuration macros

Signed-off-by: Simon Gilbert <srdgilbert@gmail.com>
2025-04-22 15:04:11 +02:00
Fin Maaß
70a787cd18 drivers: mdio: Update shell commands to include device argument
Update shell commands to include device argument

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-04-22 14:02:51 +02:00
Amneesh Singh
d7bb10d85c drivers: timer: ti_dmtimer: provide timer IRQ for tests
This patch allows ti_dmtimer to provide the symbol z_sys_timer_irq_for_test
whenever tests are enabled. Not providing this results in failing some
kernel test cases which require this symbol.

Signed-off-by: Amneesh Singh <a-singh7@ti.com>
2025-04-22 14:02:44 +02:00
Dylan Hsieh
f3bc550117 driver: adc: add adc driver for rts5912
Add adc driver for Realtek rts5912.

Signed-off-by: Dylan Hsieh <dylan.hsieh@realtek.com>
2025-04-22 14:02:37 +02:00
Titan Chen
2bca8d4e59 drivers: counter: rts5912: add support timer32 counter driver
Port rts5912 timer32 counter driver on Zephyr

Signed-off-by: Titan Chen <titan.chen@realtek.com>
2025-04-22 14:02:27 +02:00
Tahsin Mutlugun
c1c31e68b5 drivers: i2c_rtio: max32: Inform the rtio executor on errors
Call i2c_rtio_complete with a non-zero status code in case of an error
so that application does not get stuck waiting for the completion queue
event. An example to this situation could be an I2C target device
responding with a NACK to a read or write request by the controller.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2025-04-22 12:10:12 +02:00
Hao Luo
f28f4120ef drivers: pinctrl: Add sdif configs to ambiq pinctrl driver
Added sdio cd and wp pin configs to ambiq pinctrl driver

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-04-22 12:10:01 +02:00
Anders Nielsen
b98bd7c145 drivers: stepper: adi_tmc: Add tmc51xx support
Add tmc51xx support based on tmc50xx implementation.

Signed-off-by: Anders Nielsen <anders.nielsen@prevas.dk>
2025-04-22 12:09:18 +02:00
Anders Nielsen
242e6ea12a drivers: stepper: adi_tmc: Prepare for tmc51xx support
Add Kconfig option. Find common regs. Update ramp generator data.

Signed-off-by: Anders Nielsen <anders.nielsen@prevas.dk>
2025-04-22 12:09:18 +02:00
Jordan Yates
86385590c2 wifi: nrf_wifi: net_if: allocate memory before mutex
Allocate the memory in `nrf_wifi_if_send` *before* taking the nrf70
global mutex. This prevents the function from deadlocking the
application if attempting to send under memory-pressure, since many of
the memory release paths also happen under the global mutex.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2025-04-22 10:00:19 +02:00
Hugues Fruchet
24c584d2a4 drivers: clock: stm32: h7: fixed domain clock configuration
In some case, we may need to describe a domain clock for a device
while there is no way to configure it.

Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
2025-04-22 09:59:34 +02:00
Hugues Fruchet
83b33d1e87 drivers: display: stm32_ltdc: configure RIF for LTDC layer 1
Configure RIF for LTDC layer 1.

Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
2025-04-22 09:59:34 +02:00
Hugues Fruchet
873bba0a1b drivers: display: stm32_ltdc: add support of clock_configure
Add support of clock_configure() for clock source selection
through devicetree.

Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
2025-04-22 09:59:34 +02:00
Hugues Fruchet
0da7671977 drivers: display: stm32_ltdc: add support of framebuffer in psram
Add support of framebuffer in PSRAM memory.

Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
2025-04-22 09:59:34 +02:00
Hugues Fruchet
e15312bdb5 drivers: memc: stm32 xspi: add psram linker section
Add stm32_psram PSRAM linker section.

Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
2025-04-22 09:59:34 +02:00
Daniel Mangum
8e037fd89a drivers: console: uart_mcumgr: rename callback
Updates uart_mgumgr_recv_cb to uart_mcumgr_recv_cb to reflect the context
in which it is used.

Signed-off-by: Daniel Mangum <georgedanielmangum@gmail.com>
2025-04-22 09:58:40 +02:00
Steven Chang
95edcf70fc driver: i2c: ene_kb1200 i2c slave address
Fix slave address,
Notify transfer completion via semaphore

Signed-off-by: Steven Chang <steven@ene.com.tw>
2025-04-22 09:58:32 +02:00
Brandon Hurst
7ae44ec850 drivers: i2c: i2c_max32.c: Fix handling of 0-length I2C scan transactions
The I2C shell allows a user to input "i2c scan i2c0" for instance, to
scan addresses on the i2c0 bus enabled in DT. This currently causes
an infinite loop when CONFIG_I2C_MAX32_INTERRUPT is enabled.
The infinite loops happens because 0-length transactions
(tx_len == rx_len == 0) not being handled both by the Async
i2c_max32_transfer and by the controller ISR.

This commit makes two changes:
1) [ISR] When an address ACK is received, if there is simply no data to
send or receive, then just give up the semaphore, preventing the
i2c_max32_transfer function from waiting infinitely.
2) [i2c_max32_transfer] After getting the semaphore back, if there is no
data to send or receive, then avoid waiting for the BUSY flag to clear
since clock stretching should not occur by definition for transactions
which merely contain an address ACK.

Signed-off-by: Brandon Hurst <brandon.hurst@analog.com>
2025-04-22 04:34:28 +02:00
Luis Ubieda
a6c76c4dd9 drivers: i2c_rtio: max32: fix i2c_configure to return 0 on success
To comply with the API definition. This was caught by running i2c_ram
test.

Signed-off-by: Luis Ubieda <luisf@croxel.com>
2025-04-22 04:33:42 +02:00
Armando Visconti
242f3e2364 sensor: lsm6dsv16x: fix rtio/iodev prefix names
Use prefix for rtio_ctx and iodev instance names in
I2C case.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2025-04-22 04:33:28 +02:00
Tomasz Chyrowicz
2f6ac20654 drivers: flash: Optimize mspi_nor driver memory
Move MSPI NOR commands to rodata.
Replace array with empty padding (~1kB) with macro-based assignments.

Ref: NCSDK-32779

Signed-off-by: Tomasz Chyrowicz <tomasz.chyrowicz@nordicsemi.no>
2025-04-22 04:33:05 +02:00
Marcin Szymczyk
b6642bb996 drivers: flash: mspi_nor: support MODE_SINGLE and MODE_QUAD_1_4_4
Extend driver to support single lane and 1-4-4 IO modes.
Move flash chip quirks to a separate file.

Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
2025-04-22 04:33:05 +02:00
Paul Timke Contreras
503f6388e4 drivers: sensor: paj7620: added driver
Added driver for the PAJ7620 gesture sensor. For now,
just added basic gesture mode, although sensor also
has other modes (proximity and cursor modes).

Signed-off-by: Paul Timke Contreras <ptimkec@live.com>
2025-04-22 04:32:54 +02:00
Qiang Zhao
c412ee4597 drivers: firmware: scmi: add cpu domain protocol
Added helpers for NXP SCMI cpu dmomain protocol.

Signed-off-by: Qiang Zhao <qiang.zhao@nxp.com>
2025-04-21 22:03:27 +02:00
Hao Luo
706770b50f drivers: watchdog: Add support for Apollo510 watchdog
This commit adds support for Apollo510 SoC in ambiq wdt driver

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-04-21 20:04:31 +02:00
Hao Luo
6618a673e5 drivers: gpio: Add support for Apollo510 GPIO
This commit adds support for Apollo510 SoC in ambiq gpio driver

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-04-21 20:04:31 +02:00
Hao Luo
b9f05070be drivers: timer: Add support for Apollo510 SoC system timer (STIMER)
This commit adds support for Apollo510 SoC in ambiq stimer driver

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-04-21 20:04:31 +02:00
Hao Luo
1e8fb26b67 drivers: serial: pl011: Add support for Ambiq Apollo510 SoC UART
Added more clock sources for Apollo510 support

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-04-21 20:04:31 +02:00
Hao Luo
7090605026 drivers: pinctrl: Add pinctrl driver for Apollo510 SoCs
This commit adds pinctrl support for Apollo510 SoCs,
and unified pinctrl bindings across apollo families.

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-04-21 20:04:31 +02:00
Laurentiu Mihalcea
eaa1addb5e drivers: intc: irqstr: refactor level 1 interrupt recounting
So far, it has been assumed that only level 2 interrupts can be shared
via the `CONFIG_SHARED_INTERRUPTS` option, but this is not true. In the
case of i.MX95, for instance, level 1 interrupt 143 is shared among EDMA
channels 30 and 31.

Due to the previous assumption, the irqsteer driver currently performs
reference counting for all level 2 interrupts aggregated by each
dispatcher and, of course, for the level 1 interrupts the dispatchers are
attached to. For instance, assuming a machine with 100 level 1 interrupts
and 1 irqsteer dispatcher attached to line 50 this would mean reference
counting is performed solely for line 50 (and the level 2 interrupts MUX'd
into this line).

Going back to i.MX95, since there's no dispatcher attached to IRQ line 143
that means there's no reference counting for it. In turn, this means that
the IRQ line can be disabled accidentally on a channel release() operation
while the other channel is active.

To protect against such cases, refactor the level1 interrupt reference
counting. Now, reference counting is performed for _all_ level 1
interrupts.

Additionally, simplify the locking logic. Ideally, there would be a lock
for each dispatcher protecting the level 2 interrupts and 1 global lock
protecting the level 1 interrupts. Instead of this approach (which is a
bit more complex), simply use a global lock for all interrupts. If finer
granularity is required then it can be added later on.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2025-04-21 20:04:19 +02:00
Laurentiu Mihalcea
bb7efcf03b drivers: intc: irqstr: change name of level1 IRQ enable/disable
Add the "_raw" suffix to the macros handling the level 1 IRQ enable and
disable operation to signify that these operations perform no refcounting.
Additionally, shorten some portions of the name.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2025-04-21 20:04:19 +02:00
Isaev Denis
d34ed32846 drivers: display: elcdif: remove backlight enable pin dependency
The driver no longer requires a backlight enable GPIO pin to be defined,
which allows compatibility with displays that do not provide such a pin.

Signed-off-by: Isaev Denis <anelderlyfox@yahoo.com>
2025-04-21 20:03:50 +02:00
Phi Bang Nguyen
7a1285efe5 drivers: video: Add support for controls of menu types
Add support for controls of menu types, standard menu and drivers'
defined menu.

Rework the ov5640's test pattern and power line frequency controls using
this new support.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-04-21 20:03:31 +02:00
Phi Bang Nguyen
3378d683e9 drivers: video: Add support for composite controls
For controls that are dependent from others, we need to "cluster" them.
Whenever one or more controls of the same cluster are set or gotten,
only the callback of the 1st control of the cluster, i.e. the master
control, is called. The master control is the one that represents the
whole cluster.

A common type of control cluster is "auto"-cluster, e.g. auto_gain/gain,
auto_exposure/exposure, auto_white_balance/red_balance/blue_balance,
etc. If the cluster is in automatic mode, then the manual controls are
marked inactive and volatile which are read via get_volatile_ctrl().
If the cluster is put in manual mode, then the manual controls should
become active again and the volatile flag is cleared.

Re-implement the ov5640's autogain/analogue_gain controls with the new
auto cluster mechanism so that it work correctly and fully.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-04-21 20:03:31 +02:00
Phi Bang Nguyen
cbf104f3d0 drivers: video: Add get_volatile_ctrl driver's API
Add get_volatile_ctrl() driver's API to retrieve the current value of a
control marked as volatile, e.g. gain, exposure. This function triggers
a hardware register reading instead of returning a cached value to ensure
that users always get a fresh value which is constantly updated by the HW.

Note that the driver is responsible for marking a control as volatile by
setting VIDEO_CTRL_FLAG_VOLATILE when registering a control because not
all hardwares work the same way for the same control.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-04-21 20:03:31 +02:00
Phi Bang Nguyen
f363bd6e36 drivers: video: Support controls of 64-bit integer type
Add supports for controls that need 64-bit integer such as pixel rate.

Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
2025-04-21 20:03:31 +02:00