The current scan loop does not re-initialize the device number, so only
the first bus is scanned.
Change-Id: I9dc97cecd5652c353b09ab5692f59f562436f902
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
Only the first port is currently enumerated on the PCI bus. As a result,
the second port configuration will be set based on the default options,
that may be invalid on some platforms.
Fix this by enumerating the second port as well.
Change-Id: I63733a1f13f7cb35cae1dba3b6192dcd61c9f644
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
ADC allows to program repetitives sampling after a read request.
User should be able to provide buffers for each table entry that can
hold subsequente repetitive samples.
Change-Id: I75da4a480a0e3f241d9276cf4fe3999a9cfbba2c
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Buffer management on dw driver was too complex.
New buffer management follows the following behavior.
- Each sequence entry have one sample at a time.
- Each sequence entry have a buffer to store that sample.
- If ADC have repetitive sampling configuration, the buffer value
is overwritten with the new value.
New buffer management allow us to remove Synposys'
files and license headers as well.
Change-Id: I75bbbee59bea400839bb34ca1fcb2111073f99d0
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Fixes interruption connection parameters, ISR parameter is not null anymore.
Removes irq_connect call that is a dynamic irq api that should not be
used along static irq api: IRQ_CONNECT_STATIC and IRQ_CONFIG.
Change-Id: I232c8562d2dcda3229776b561e2c1f4608a31cdd
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
The current gpio_dw_initialize implementation masks the interruptions in the line
dw_write(base_addr, INTMASK, ~(0)) to assign api functions and initialize
interrupt vectors and handlers safely. Immediately after this, the driver expects
that gpio_dw_unmask_int(port) unmasks the interrupts. Without this patch that
implementation is empty for the quark se ss board.
Change-Id: Iac84c8807fcadad8c256c3fcaa4ff624b6337bf3
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Use a default priority to avoid Kconfig blocking when priority
is not set in SoC or Board.
Change-Id: I4edda47b955a7ee834f04dc40d0decbd8dee6305
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This adds a driver to utilize the DesignWare timer IP block
to do PWM.
Change-Id: I11ba689350b664209ad2440e3001e57eb38fd982
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Change terminology and use SoC instead of platform. An SoC provides
features and default configurations available with an SoC. A board
implements the SoC and adds more features and IP block specific to the
board to extend the SoC functionality such as sensors and debugging
features.
Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use a real board name that can run this kernel instead of a generic
name. Basic functionality exits on this board with Zephyr.
Setup of the board is mostly similar to what we have in galileo (EFI
based)
Change-Id: Ic8554f26dcac0dbbbb6d35d863482f6207dc63c5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The Galileo board is based on the X1000 SoC, so move galileo to
boards and create this SoC instead, inheriting all SoC related code
and configuration items.
Change-Id: I9b39f1b44644775ee48acae284b82bae7876fffb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Using number_removed to find out how many packets from unack queue we
need to clear.
Change-Id: Icad948892f3ab1febc939e9ba6d6b3431973633e
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
We might get out of sync packet because of race collision, drop it.
Change-Id: Ic84a760199df1520dc7a95383972f9ec428c7fde
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Analyze stack when sending single ACK packet.
Change-Id: Ifd3a54f0d1ad9a644363563fa9b8bea05b895fa9
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
If there is no packet to be sent after timeout we have to send ACK for
last received packet.
Change-Id: I30bbc4ae1a257f9a7351dc5a5d2f1269740ce447
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add initial code for three-wire (H5) Bluetooth uart driver.
At the moment the driver is EXPERIMENTAL. To test use following
method with qemu:
Run btproxy with three-wire emulation patches:
$ sudo tools/btproxy -d --pty -3
Opening pseudoterminal
New pts created: /dev/pts/21
Opening user channel for hci0
Notice that new device created: /dev/pts/21, use it with qemu -serial
parameter.
Run qemu target with following parameters:
$ make qemu 'QEMU_EXTRA_FLAGS=-serial /dev/pts/21'
Change-Id: I51579ffd8088583df9106689a03b2a0b4aa9e4cb
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Remove extra line and correct style according to common style.
Change-Id: I5fc9434edce44e52b51fc40866638c0899985b1b
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Needed headroom depends on type of the UART driver, change it
accordingly.
Change-Id: Ic9bf5f08a49be6823fce5eff8139d5f949b313ca
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The LCD display is an add-on, not a feature of the platform or the
board.
Set the defaults and remove the definition from Galileo Kconfig.
Change-Id: Ic319cd765d2dc1fe08cc65615680821fe9bc6a83
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
1. Need to unmask interrupts for the sensor subsystem.
2. The GPIO controllers need their clock enabled before they can
start sending out interrupts.
3. Setting up ISR on ARC requires usage of irq_connect().
Change-Id: I633b07292f11e5c5e768fc51fabb70769d407609
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add an option to specify to which I2C master the Grove LCD
is connected, instead of already using the i2c_dw driver
port #0.
Change-Id: I4e61ef8e31c75ae912e2d16f8939369c0b8bbc2c
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The code to poke the system integration module to disable clock gating
for UARTs only works for UART0-3 since all the bits are in the same
register. However, clocks for UART4 and UART5 are controlled by
another register. This means that we have been writing to the wrong
bit for enabling UART4.
This patch fixes this issue, and moves the clock gating clock into
board initialization. The incorrect code has also been removed to
prevent accidental mis-use. The dev_data struct is no longer needed
for uart_k20, so that is removed as well.
Change-Id: I67845a417e43647bf0ffcbdbda34ce68fa887713
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
ANSI sequences may have a numbered prefix which means that the action
needs to be taken the number amount of times, e.g. "Esc[ValueA" (move
cursor forward Value number of characters). Some ANSI commands also
have two preceding values, such as Esc[Line;ColumnH (move cursor to
Line & Column).
To support these ANSI sequences we need to track a bit of extra state,
most conveniently done using a bit field. Since the ANSI parsing logic
gets a bit long at this point it's refactored into its own handle_ansi()
function.
Change-Id: I0711f869d5324f9f827915fde468fe470e7689ed
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Instead of keeping track how many characters we need to move back to
get to the original position, take advantage of the save/restore
escape sequences. This allows us to drop the extra 'i' variable from
both insert_char() as well as del_char().
Change-Id: I69a2b5ea12ec2a7a2e4d519b55e4c737b5d5d25a
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
MVIC has only one local interrupt: the timer IRQ. What IRQ line
to use is not fixed, instead it is programmed into the LVTTIMER
register. This is unlike LOAPIC which has a fixed IRQ for the timer
and instead the *vector* to use for it is programmed into LVTTIMER.
We don't want _loapic_int_vec_set() to do anything as the relationship
between IRQ lines and vectors is fixed and we do not want to be
programming vector numbers into bits 0-3 of LVTTIMER.
The IRQ line to use for timer interrupts is programmed into LVTTIMER
when the MVIC is initialized.
Change-Id: Icba0429f65ece7541fa8542814a8fdc39ad43936
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Quark SE Lakemont core has a hardware bug where the LOAPIC does
not properly notify the IOAPIC to clear the IRR bit for level-
triggered interrupts.
This patch introduces a workaround where the vector ID of the
in-service interrupt is manually written to the IOAPIC_EOI
register, resulting in the bit being cleared.
Unfortunately, in the context where EOI happens it's very difficult
to identify which IRQ line is being serviced, so this is done
unconditionally for all interrupts vectors whether they are registered
in the IOAPIC RTE table or not.
Change-Id: I639cd258dec4f50934e17eadbb821e6a7112e636
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Instead of having two config options to specify interrupt triggering
conditions, merge them into one option and clarify. This is now
similar to other drivers which have interrupt triggers.
Change-Id: I4e60c8c45a08d005dcc8256cb89e4c5be7c94307
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Move the common #define for IOAPIC interrupt trigger flags out of
platform board.h and into the driver.
Change-Id: I89090181acb5f48dd797e7773ab65c5f3d46c42a
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Move the common #define for IOAPIC interrupt trigger flags out of
platform board.h and into the driver.
Change-Id: Ie7262b69226ebffa7e1b9e35725fda24b3fe089f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Move the common #define for IOAPIC interrupt trigger flags out of
platform board.h and into the driver.
Change-Id: I2d50457a45fae62ff085f7239712d580243253bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Move the common #define for IOAPIC interrupt trigger flags out of
platform board.h and into the driver.
Change-Id: Ia0a069464392714f38037841de52e8d265fa4f49
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
