Rename them to device_sync_ to fit in the device_ namespace.
Change-Id: I1088dda958584ed90b97137298050fee44c20ee4
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
SPI, to control the CC2520 chip, is the only generic feature and thus
the only one configurable through Kconfig. GPIO on the other end depends
a lot on the SoC/Board. Adding a slave select option as well.
Change-Id: I63068fab476ed8d5b26103e4ad20e5be253c9932
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
FIFOP setting is a wrong assumption to know if radio is on.
Transmission runs on clock basis instead of pre-set loop counter. Thus
removing useless config option relevantly as well.
Opmitizing a bit the code as well, and making cc2520_on() public for
testing purpose.
Change-Id: I4495d1d6c19d10dcbc18f7e2fd5041720ec1f438
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
CC2520 drivers as a singleton:
Current driver can only handle a single instance. This is due to the
gpio callback which cannot provide the concerned device (not the gpio
device, the cc2520 one). Setting a singleton instance for now, as the
network stack cannot handle more net devices anyway. This will be fixed
in the future.
In the mean time: improving a bit the usage of spi and gpio by accessing
the cc2520 instance directly.
Also: simplifying SPI usage, useless internal locking removed, better
debugging routines, better busy wait macro and use Zephyr's BIT() macro
instead of internal one.
Change-Id: I92b849135a92f77ee6a4374c9f662dcad8347814
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Integrating it into network stack. Centralizing all in drivers/802.15.4
Change-Id: Ia2916ff652afe5fe736f6560c2ed4a911a5f0679
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Reading: As when setting up the transfer, Rx has to adapt to current
left Tx lenght.
Writing: If nothing will be transmitted anymore, downsizing the level to
0. This fixes a hanging issue while making the controller being busy for
nothing. Another hack found to fix the same issue was to test the SR
Busy flag bit in the ISR handler. As the threshold level makes more
sense, kepping this one.
Change-Id: I87ba393d507c9418295f188d866d9979f423536c
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The numeric code to configure sample width in ADC needs correction.
Change-Id: I6d73db674852650f70178322d949f9b2b49f97af
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Adds extern "C" { } blocks to header files so that they can be
safely used by C++ source files.
Change-Id: Ia4db0c36a5dac5d3de351184a297d2af0df64532
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
Introduce the GPIO QMSI-based implementation. This is basically a
shim layer that implement's Zephyr's GPIO APIs on top of QMSI drivers.
This is an alternative driver that conflicts with the previous
GPIO_DW implementation. In order to enable it you must set:
- CONFIG_GPIO=n
- CONFIG_GPIO_QMSI=y
- CONFIG_GPIO_0=y
- CONFIG_QMSI_DRIVERS=y
- CONFIG_QMSI_INTALL_PATH="PATH_TO_QMSI"
Note that this driver currently only supports one controller instance,
GPIO_0. It is implemented this way due to a limitation from the current
version of QMSI. QMSI versions later than 1.0 doesn't have this
limitation.
Missing:
- support multiple controller instances (gpio_0, gpio_1, etc);
- enable level triggered interrupts in sync with system clock,
through setting INT_CLOCK_SYNC properly.
Change-Id: Ib61b153dae9741806a9a31d7dc1f82b96d000fbe
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This commit changes the behavior of the driver when it reports
buffer results back through the callback.
Originally, the driver reported a callback after each sequence
table round signaled by an interrupt. If in repetitive mode,
each reported result was put in the next buffer element,
which was considered circular, and reported back with callback.
Now the behavior changes. If in repetitive mode, each sequence table
round reported by an interruption puts the data in next element of
the reception buffer. The callback reports back once the buffer is
fulled and stops the sampling process.
Change-Id: I3707574cfaf5dfc874473f38c5dfa88dd392133d
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
On Curie SoC the ADC must always be configured in single ended mode.
Change-Id: Ie59b4180358153865c961b66f98321db60d4269f
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
After exiting a deep power down mode a dummy conversion is required.
Change-Id: I98dad19e168984efe7af6ad360d0cc46e6603736
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Curie specs states that the ADC_PWR_MODE_STS bit in the
IO_CREG_SLV0_OBSR register must be polled to check if
the requested power mode equals the current power mode.
The bit is set to 1 when requested and current modes match
and the bit is located as the bit 0.
Change-Id: I030d7693d36fb96f09a9cbdd404118674fcb089a
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
ADC DW IP requires a calibration process each time the
IP recovers from a deep power down mode.
Change-Id: I2e02d1987af9addd9cb08a4e4e8d3848ad5b623c
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
On NANOKERNEL level only of course. Some devices, initialized at this
level, may require to get the clock running already.
Change-Id: Id2dd830d915474aac6c080068c2cf356cf841e0c
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Controller should not be enabled while configuring or setting up a
transfer call. It's enabled once the transfer call is ready to proceed,
and disabled once the last interrupt has be raised.
Change-Id: Ib9125a3600971b57e642730682f2b3bfb91b1e02
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
On Quark SE, SPI might require GPIO to be ready before hand, to emulate
CS, thus providing an option to tweak the intialization priority for SPI
DW driver.
Change-Id: Ifa373948ac8227bf6e4ed1113bcb4dc9139b6663
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
It might be necessary to emulate CS through a GPIO pin depending on
these 2 conditions:
- the controller's CS pin is not wired, and thus a GPIO pin is the only
option
- The controller is unstable at a certain frequency and cannot set/unset
CS reliably. This is actually a possible issue on DesignWare's SPI
controller in Quark SE or Quarks D2000 where it has been found
unstable at 1Mhz and above.
Change-Id: Ib6a06577906c005ddd347070d476a367a9c3da8a
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
- Refine how DFS is calulated now that it is strictely used to
manipulate buffer lengths.
- Fix threshold limit
- Tune RX threshold relevantly (reduce it if rx_len is lower than actual)
- Don't push more than available left space in FIFO
- Tune the private structure to lower memory space occupation
Change-Id: I65b1b48b996b2104cebcb24cc366fb4dcbf7d53b
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
IMR and ISR bits are same, but it stil better to differentiate them
properly. Also fixing naming where all ISR ends with an 'S'.
Change-Id: I2fc1e1d8d2743c3d98f5da40a5f4720a85c4f9a7
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
On ARC, the SPI IP block might be accessible only via user extended
auxiliary registers, which requires different instructions to read from
and write to.
Change-Id: I3aa5f223938a9aed7795de4aedc64bd529d62942
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Registers offsets are hopefully all the same, but size differs.
On x86, thus 32bits support, CTRL0 or DR for instance are 32 bits r/w.
And DFS on 32 bits support is placed differently as well.
Change-Id: I5115d5c3c9bba71ece4a6f4a1d3d2fdc203c8da1
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Only 8 bit frames were supported. Added support for bigger data frames
which can go up to 32 bits (on 32bits version of the controller, 16 bits
otherwise). Store the frame size in bytes during configure, and use it
during pull/push to read/write correct frame size.
Change-Id: Iae8c55442e0a205403aa3febd1811b36aaf4c5b6
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
If SPI_INTEL is not requested, no need to instanciate specific value.
Change-Id: I5f41d919e258e420f2bd099db88ed2259f9cd27e
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
There is no such thing as "IA" in Quark SE SS as it is an ARC core. Plus
for this very specific feature it does not require the ARC aux regs
instruction to read/write in the given mask address.
And fixing also the CONFIG_ option to check.
Change-Id: I1f63348ec85f6e006795f7641c912a30fc003709
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This is valid only for Quark SE and Quark SE SS, where it requires to
unmask the interrupt for each specific controller. Thus making the
function generic, using the parameter as the specific mask base address.
Change-Id: Iea0a412b8d94a1ab5e1f3e339eaf632eacee5797
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This adds driver for the UART controller on Atmel SAM3X8E.
This UART controller only has two wires for RX and TX, and
does not have flow control (e.g. CTS, RTS) or FIFO.
Currently, the driver does not support any interrupt driven
operations.
Change-Id: I63720bccfb70a89888353b8ee3dfc4b80793dc01
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Introduced by commit 01d6f9f5ee0867f6ee8dc1506c2ebe62d9f296bb
Reported by Gustavo Lima Chaves
Change-Id: Ic29c33f4339c83a55ca45e93000cbc07b8dadbd2
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Introduced by commit a6873a00d816daf303b0380dda91accd28df6497
Reordering the irq config function, and removing useless parameter.
Change-Id: I2d22cfe81153b104044d8672dd57115138437ed9
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This patch introduces the QMSI I2C driver which is simply a shim driver
based on I2C driver provided by QMSI BSP.
This initial version supports only I2C_0 controller in 'master' mode.
Due to some issues with qm_i2c_master_irq_transfer API, the driver uses
the polling APIs from QMSI. This means that the current thread doesn't
sleep (i.e. is not scheduled out) while the I2C transfer is carried out.
The qm_i2c_master_irq_transfer() issue is under investigation.
Below follows the missing features which will be addressed by a new
version of this patch or by upcoming patches.
* Block the current thread until the I2C operation has actually
completed.
* Add support for multiple controllers.
* Add support for slave mode.
* Add support for suspend() and resume() APIs.
In order to enable this driver, the following options should be set:
CONFIG_QMSI_DRIVERS=y
CONFIG_QMSI_INSTALL_PATH="/path/to/libqmsi/directory"
CONFIG_I2C=y
CONFIG_I2C_QMSI=y
Finally, due to the lack of proper support for Quark SE in QMSI 1.0.0,
this driver requires QMSI version greater than 1.0.0.
This driver has been tested only with Quark SE based boards.
Change-Id: I369992c7b5fe37f7e0b45be7f19e667ad1fca9ac
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
NBLE defaults (eg for BLUETOOTH_MAX_PAIRED) were not limited to
!BLUETOOTH and resulted in overwriting BLUETOOTH defaults.
Change-Id: I1e4a90c00c15252bb3db927b42641f9a479f4aa6
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
Select cannot be used for int type of variable. This will stil work
correctly as default value is provided. Fix following:
drivers/nble/Kconfig:50:warning: 'BLUETOOTH_MAX_PAIRED' has wrong type.
'select' only accept arguments of boolean and tristate type
Change-Id: I15951a3ba9efa11e1c18a1e90eb708ced08ad357
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
This converts the i2c_quark_se_ss to use the static IRQ API.
Note that, even with separate config functions for each instance of
the driver, it is still saving both RAM and ROM space.
Change-Id: Ieb555ff281b384d87d8e69f6914878bbee0e2ee9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
An application will not care about the implementation and will want
to only reference a well define name for the IP, the configuration
system will take care of the rest.
And application will bing to the drivers this way for example:
dev = device_get_binding("WATCHDOG");
Change-Id: I8a0fde34602320de643a0ad911d19c9985600e7e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This makes it easier to port samples which may use
CONFIG_BLUETOOTH_MAX_PAIRED.
Change-Id: I3e37df7cae63a4ac2219ce26408ae4d4f987645d
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This make more sense since the handles are normally self allocated by
the stack.
Change-Id: I198dd9c3ef6259cff8a0e528514918ec18990dea
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
Add API definition and stubs for directed advertising.
Change-Id: Ib22d3acb6d2e76b0c638b26b8e07860cd189f640
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
All of the authentication APIs deal with bt_conn objects. For
consistency it makes therefore sense to use the proper bt_conn name
space with them.
Change-Id: I47912d542373df511524cc6ad2532d6c9a76ca68
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
To have some proper split of conn.h and bluetooth.h APIs make sure all
bt_conn related ones are in conn.h. This also helps avoid forward
declarations for some upcoming patches where we need bluetooth.h
defines from within conn.h.
Change-Id: Ief3d32118a6749fb5785dab6cb3fee4ebb86ddb4
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The authentication APIs may fail, so it's fair to give the application
a chance to catch these errors.
Change-Id: I323df86b94a823b201fe22d412e6bbcaa9029550
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Update the advertising API according to what has recently been
discussed and agreed upon.
Naming-wise the most important change is the removal of "EIR" which
was confusing since this is mainly used with LE at the moment. The
Core Specification Supplement consistently uses the generic terms data
and data type to describe what we're dealing with here, so the new
names are bt_data and BT_DATA.
Another change is to detach the actual data from the struct by
converting it from an array to a pointer. This is not only essential
for supporting BR/EDR (which has a different length) but to also
minimize memory usage.
Another change is to require the caller of bt_le_adv_start() to
provide the array lengths of the ad and sd paramters. This way we
don't have to have the empty (8-byte) element at the end of each
array.
Lastly, the bt_le_adv_start() logic is slightly modified so that it
will always clear the respective data if necessary. Previously the
user might have been left with a previous callers data if it passed
NULL to the API.
Change-Id: I318026ceb1b52bb688edf4dcfed82613bd15c3e1
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
