Commit c0bd8a0ce4 ("api: dma: dma api update") introduced some new APIs
and deprecated the old ones. Let's move to the new API before the old
calls are completely removed.
Change-Id: I21795fa20124f8101c56b0fceb0f0d9afd96b0f0
Signed-off-by: Lee Jones <lee.jones@linaro.org>
File include/misc/sys_log.h has been moved to include/logging/sys_log.h.
Change-Id: I011ca632396b574ae7e388b47fc2ba3a58fafc7b
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Providing a new line, then an attribute on the same line as the
following closing bracket is odd. Move to something more
transitional and in line with regular coding standards.
Change-Id: I08f7cd76ca2f522a8b5b6de2e5baf94e95b5195a
Signed-off-by: Lee Jones <lee.jones@linaro.org>
It is possible to evaluate the TXE bit *before* H/W has had the
opportunity to detect that data is being processed. Therefore
we should hold off on any evaluation until TXE has initially been
set.
Change-Id: Iff26bfbe3ab419734003bf81a4cb357de83908e7
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Currently only 1 is allowed. While we're at it, let's generify the
existing entries, since they could be used by all controllers, not
just QMSI.
Change-Id: Iec5d195fff239931b21a7584eb4b642b40f95be5
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Currently the entries for STM32 UART ports are at the same level than
the top menuconfig UART_STM32. As a result they are mixed with other
configs in the "Serial Drivers" menu.
Use if/endif grammar to put these entries under a dedicated STM32
submenu.
Change-Id: If28945204b801578d29f8cce7c2370ca3c2737a1
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Add support for GPIO banks I to K that can be found on some high-density
STM32F4 products.
Change-Id: I2cb65ed4d4a2282f7d17478cb1fcdd65dffe71b0
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The registration of each GPIO bank differs by only few details. These
differences can be factorized in order to create a generic registration
macro.
This has several advantages:
- Less code
- Easier to add new banks
- Less work to add support for new STM32 families
The diff stat speaks for it-self: 26 insertions(+), 92 deletions(-)
Change-Id: I674752fda5ee3caefb815ccf070a1b636b16cf85
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The PLLN multiplier can range between 50 and 432 on all STM32F4, except
on the STM32F401 where the lower bound is restricted to 192.
Fix the range property and the help text to reflect this reality.
Change-Id: I7b93e84b321f7869aaf611287344cd3e25c893c8
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Since all interrupts come in on the status line,
we only connect it for the KL2X.
Change-Id: Ia9e0d483fe68464a0eeab08c95a043260e5793b0
Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
Clear pending IRQ when starting and restore back the RTC1 state when
disabling sys_clock, to avoid issues when soft rebooting the device or
chainloading another Zephyr image (e.g. mcuboot).
Change-Id: I693d9168196ad2cfb8475ecfa2051eac043b1fbd
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
In prep for supporting the older KL2x SoCs that use a different SPI
block, rename the current SPI driver to DSPI to match what the MCUX HAL
defines it as.
Change-Id: I9097580df5fca649ab6fd9a38212fced0b1ea6ed
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
At the moment CC2520 configuration options are selected inside "TI
CC2520 Driver RAW channe" submenu like:
[*] TI CC2520 Driver support ----
[ ] TI CC2520 Driver RAW channel --->
Make RAW channel depends on TI CC2520.
Change-Id: I92879b7f4391f1842c012b6c03c78956e90b9441
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The fxos8700 is primarily an accelerometer/magnetometer, but it does
also include a temperature sensor. Note that the temperature sensor is
uncalibrated and can only be used when the magnetometer is enabled
(magnetometer-only mode or hybrid mode).
Change-Id: I74c4ae68c30e0f9836caa70baed44ad8956b17ea
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Declaring these as const lets the linker generate more optimal code.
Some extra care is needed with hci_ecc.c since it was overwriting the
send callback. Now the choice of send() call is done directly in the
bt_send() function
Change-Id: Iac74f5ee9bee097bbb34c11bd13d1d886700f5cc
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Support connection via SPI and keep I2C as the default.
Jira: ZEP-1698
Change-Id: I42a76131577a37429375364deb07e451107f5d81
Signed-off-by: Dario Pennisi <dario@iptronix.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Allow user to set the four last bytes of a MAC address.
By default the bytes are selected randomly but for testing
purposes we need a way to specify the address in advance.
Change-Id: Ic9820a8026b327d1ee5025ab77fdc77f5778de67
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Networking stack has split one global DATA pool to RX and TX DATA pools
and also added net_buf pool support to each context. Update the driver
to support this new design. Since the GMAC TX descriptor list has a fixed
size but the number of TX DATA buffers is no longer limited updating the
TX descriptor list has to be guarded by a semaphore.
Tested on Atmel SMART SAM E70 Xplained board
Change-Id: I181e1cdd183e173b85d5d1711b6e78cd5165666d
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
It is possible that the slip->last pointer is not set during
the startup of the slip driver if we receive some garbage bytes.
This in turn caused memory to be overwritten in random places.
Jira: ZEP-1737
Change-Id: Ia2ce193b81a8f707b7ca63497d497ea70699bb32
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
No need to always look through all the network interfaces
when receiving packet as we support only one interface and
it is always the same one.
Change-Id: Ic0bfabc8409160352081cac1a6c3dbbfa35fe390
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
The current state of affairs will not allow to set a MAC address and
thus will initialize a random MAC address.
However, when we are in a situation where we are trying to interface
Zephyr OS QEMU VMs with physical targets for testing, this is not
practical. We need to create a macvtap interface, on which we need to
set the MAC address of the Zephyr OS SLIP device so packets can be
routed. There is no way to guess which random address is going to be
used, and there is no practical way to query it.
So this patch adds a CONFIG_SLIP_MAC_ADDR config
setting. slip_iface_init() is changed to take the code from
slip_get_mac() for initializing the MAC address (which should be
happening there anyway) and if CONFIG_SLIP_MAC_ADDR is set, it takes
that one -- otherwise goes to generate a random one.
Change-Id: I55a68f2743604f310d41c934783eca82084d7e94
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
Add few nop instructions to allow the DMA controller settle,
It takes time after starting the transfer to access the DMA
controller registers, so a few cycles are added, the minimal number
of cycles needed has been calculated using tests results on c1000
development board.
Jira: ZEP-1803
Change-Id: I1f8e8478f0350e1b6e4dd596b783dc4babc2d02b
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
This commit adds missing RAW mode device to the driver.
Change-Id: I9ee9c41bc94b0ae202613ef707030033b46df1de
Signed-off-by: Wojciech Bober <wojciech.bober@nordicsemi.no>
The PHY debug code is useful while working specifically with the PHY
state machine, but in general the frequent, periodic nature of the
output is a hinderance. Turn down the verbosity, leave a local define
available for anyone who specifically needs to see the PHY state
machine debug.
Change-Id: I40e59b6df5c29702813d3a554ea9e795a3761c65
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
The enc28j60's reception routine requires a timeout
for a buffer assignation. The timeout is configurable
to allow a per application fine tuning.
The effect that K_NO_WAIT currently has is that there are frames
lost everytime that a buffer is required and there are none
available.
Jira: ZEP-1169
Change-Id: Ia18736fd85daee51fe1c2304977209cc7f0038b5
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
The code used net_nbuf_get_reserve_{rx|tx}_data() function to
allocate a fragment. Instead of that low level function, use
net_nbuf_get_frag() instead. There are few places this is not
possible or is too big change like in few test programs.
Change-Id: Ied7e2b7db352de998b200ffa6ff82471bfa5ebe3
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
If we receive lot of packets, it might happen that we exhaust
all the DATA buffers in the system. This would prevent from
us sending anything to the network.
Change this by splitting the DATA buffer pool into RX and TX
parts. This way RX flooding cannot consume all DATA buffers
that needs to be sent.
Change-Id: I8e8934c6d5fdd47b579ffa6268721b5eb3d64b6d
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Provide a configuration option for promiscuous mode.
Promiscuous mode provides a convenient workaround for ZEP-1673 however
it generates significant demand for RX buffers on a loaded network.
Add a configuration option to conveniently enable / disable.
The Kconfig defaults promiscuous on to workaroudn 1673, once that
issue is resolved the default logic on NET_IPV6 will be dropped.
Change-Id: I6929aca70d7bd88ce88c65d6654d664ea6653b66
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Basic Watchdog driver for Atmel SAM family MCUs. Currently only
disabling the watchdog is supported.
Tested on Atmel SAMV71 Xplained Ultra Evaluation Kit.
Origin: Original
Jira: ZEP-1684
Change-Id: I8f717c7f53aa290c944b7935e0570c2a6f53956e
Signed-off-by: Souvik K Chakravarty <souvik.k.chakravarty@intel.com>
Provide a random driver wrapped around the MCUX TRNG driver.
Change-Id: Icbd7ab587aa18ecbd7eae52290aaa5d8ee504cf2
Origin: Original
Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
MCUX contains more than one type of random number generator,
so refrect this in config and file names.
Change-Id: Iba4482a1ae41f35d471686f8b159c113147c4df8
Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
Current users of sys_bitfield*() are bending over backwards to cast
what is most of the times a pointer into an integer.
Bitfields can be better described with an void *, so
uint{8,16,32,64}_t or any other container can be used. Most
sys_bitfield*() operations, by extension, can do the same. Note void *
has byte arithmetic, like char *.
This change will also make it implicit, for any future split of the
address space between virtual (what the SW is seeing) and physical
(what the HW is seeing) way clearer, as the functions dealing with
physical, non directly referentiable/mappeable addreses to use an
integer type, like mem_addr_t.
- include/arch/ARCH/*asm_inline*:
- sys_bitfield*() all modified to take 'void *'
Note 'void *' arihtmethic is byte based, which makes some things
easier.
- include/sys_io.h:
- introduces DEFINE_BITFIELD
- update docs
- tests/kernel/bitfield: remove all the cast contortions, use DEFINE_BITFIELD
PENDING: update other TCs
- include/arch/nios/nios2.h, drivers/interrupt_controller/ioapic_intr.c:
remove cast contortions
Change-Id: I901e62c76af46f26ff0d29cdc37099597f884511
Jira: ZEP-1347
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
