spi: Refactor mcux dspi driver to use dts
Get the driver name, base address, irq number, and irq priority from dts. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
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7 changed files with 45 additions and 30 deletions
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@ -88,4 +88,25 @@
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#define FLASH_DEV_BASE_ADDRESS NXP_KINETIS_FTFE_40020000_BASE_ADDRESS
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#define FLASH_DEV_NAME NXP_KINETIS_FTFE_40020000_LABEL
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#define CONFIG_SPI_0_NAME NXP_KINETIS_DSPI_4002C000_LABEL
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#define CONFIG_SPI_0_BASE_ADDRESS NXP_KINETIS_DSPI_4002C000_BASE_ADDRESS
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#define CONFIG_SPI_0_IRQ NXP_KINETIS_DSPI_4002C000_IRQ_0
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#define CONFIG_SPI_0_IRQ_PRI NXP_KINETIS_DSPI_4002C000_IRQ_0_PRIORITY
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#define CONFIG_SPI_0_CLOCK_NAME NXP_KINETIS_DSPI_4002C000_CLOCK_CONTROLLER
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#define CONFIG_SPI_0_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002C000_CLOCK_NAME
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#define CONFIG_SPI_1_NAME NXP_KINETIS_DSPI_4002D000_LABEL
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#define CONFIG_SPI_1_BASE_ADDRESS NXP_KINETIS_DSPI_4002D000_BASE_ADDRESS
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#define CONFIG_SPI_1_IRQ NXP_KINETIS_DSPI_4002D000_IRQ_0
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#define CONFIG_SPI_1_IRQ_PRI NXP_KINETIS_DSPI_4002D000_IRQ_0_PRIORITY
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#define CONFIG_SPI_1_CLOCK_NAME NXP_KINETIS_DSPI_4002D000_CLOCK_CONTROLLER
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#define CONFIG_SPI_1_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002D000_CLOCK_NAME
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#define CONFIG_SPI_2_NAME NXP_KINETIS_DSPI_400AC000_LABEL
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#define CONFIG_SPI_2_BASE_ADDRESS NXP_KINETIS_DSPI_400AC000_BASE_ADDRESS
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#define CONFIG_SPI_2_IRQ NXP_KINETIS_DSPI_400AC000_IRQ_0
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#define CONFIG_SPI_2_IRQ_PRI NXP_KINETIS_DSPI_400AC000_IRQ_0_PRIORITY
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#define CONFIG_SPI_2_CLOCK_NAME NXP_KINETIS_DSPI_400AC000_CLOCK_CONTROLLER
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#define CONFIG_SPI_2_CLOCK_SUBSYS NXP_KINETIS_DSPI_400AC000_CLOCK_NAME
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/* End of SoC Level DTS fixup file */
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@ -66,6 +66,20 @@
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#define FLASH_DEV_BASE_ADDRESS NXP_KINETIS_FTFL_40020000_BASE_ADDRESS
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#define FLASH_DEV_NAME NXP_KINETIS_FTFL_40020000_LABEL
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#define CONFIG_SPI_0_NAME NXP_KINETIS_DSPI_4002C000_LABEL
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#define CONFIG_SPI_0_BASE_ADDRESS NXP_KINETIS_DSPI_4002C000_BASE_ADDRESS
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#define CONFIG_SPI_0_IRQ NXP_KINETIS_DSPI_4002C000_IRQ_0
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#define CONFIG_SPI_0_IRQ_PRI NXP_KINETIS_DSPI_4002C000_IRQ_0_PRIORITY
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#define CONFIG_SPI_0_CLOCK_NAME NXP_KINETIS_DSPI_4002C000_CLOCK_CONTROLLER
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#define CONFIG_SPI_0_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002C000_CLOCK_NAME
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#define CONFIG_SPI_1_NAME NXP_KINETIS_DSPI_4002D000_LABEL
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#define CONFIG_SPI_1_BASE_ADDRESS NXP_KINETIS_DSPI_4002D000_BASE_ADDRESS
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#define CONFIG_SPI_1_IRQ NXP_KINETIS_DSPI_4002D000_IRQ_0
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#define CONFIG_SPI_1_IRQ_PRI NXP_KINETIS_DSPI_4002D000_IRQ_0_PRIORITY
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#define CONFIG_SPI_1_CLOCK_NAME NXP_KINETIS_DSPI_4002D000_CLOCK_CONTROLLER
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#define CONFIG_SPI_1_CLOCK_SUBSYS NXP_KINETIS_DSPI_4002D000_CLOCK_NAME
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#endif /* CONFIG_SOC_MKW22D5 || CONFIG_SOC_MKW24D5 */
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#if defined(CONFIG_SOC_MKW40Z4) || defined(CONFIG_SOC_MKW41Z4)
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@ -99,21 +99,12 @@ if SPI
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config SPI_0
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def_bool y
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config SPI_0_IRQ_PRI
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default 3
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config SPI_1
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def_bool n
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config SPI_1_IRQ_PRI
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default 3
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config SPI_2
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def_bool n
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config SPI_2_IRQ_PRI
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default 3
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endif # SPI
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if NETWORKING
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@ -102,21 +102,12 @@ if SPI
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config SPI_0
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def_bool y
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config SPI_0_IRQ_PRI
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default 3
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config SPI_1
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def_bool n
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config SPI_1_IRQ_PRI
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default 3
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config SPI_2
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def_bool n
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config SPI_2_IRQ_PRI
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default 3
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endif # SPI
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if NET_L2_ETHERNET
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@ -97,9 +97,6 @@ if SPI
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config SPI_1
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def_bool y
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config SPI_1_IRQ_PRI
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default 3
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endif # SPI
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if IEEE802154_MCR20A
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@ -9,6 +9,7 @@
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menuconfig SPI_MCUX_DSPI
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bool "MCUX SPI driver"
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depends on HAS_MCUX
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select HAS_DTS_SPI
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default n
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help
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Enable support for mcux spi driver.
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@ -260,7 +260,7 @@ static const struct spi_driver_api spi_mcux_driver_api = {
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static void spi_mcux_config_func_0(struct device *dev);
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static const struct spi_mcux_config spi_mcux_config_0 = {
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.base = DSPI0,
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.base = (SPI_Type *) CONFIG_SPI_0_BASE_ADDRESS,
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.clock_source = DSPI0_CLK_SRC,
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.irq_config_func = spi_mcux_config_func_0,
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};
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@ -277,10 +277,10 @@ DEVICE_AND_API_INIT(spi_mcux_0, CONFIG_SPI_0_NAME, &spi_mcux_init,
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static void spi_mcux_config_func_0(struct device *dev)
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{
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IRQ_CONNECT(IRQ_SPI0, CONFIG_SPI_0_IRQ_PRI,
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IRQ_CONNECT(CONFIG_SPI_0_IRQ, CONFIG_SPI_0_IRQ_PRI,
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spi_mcux_isr, DEVICE_GET(spi_mcux_0), 0);
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irq_enable(IRQ_SPI0);
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irq_enable(CONFIG_SPI_0_IRQ);
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}
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#endif /* CONFIG_SPI_0 */
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@ -288,7 +288,7 @@ static void spi_mcux_config_func_0(struct device *dev)
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static void spi_mcux_config_func_1(struct device *dev);
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static const struct spi_mcux_config spi_mcux_config_1 = {
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.base = DSPI1,
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.base = (SPI_Type *) CONFIG_SPI_1_BASE_ADDRESS,
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.clock_source = DSPI1_CLK_SRC,
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.irq_config_func = spi_mcux_config_func_1,
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};
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@ -305,10 +305,10 @@ DEVICE_AND_API_INIT(spi_mcux_1, CONFIG_SPI_1_NAME, &spi_mcux_init,
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static void spi_mcux_config_func_1(struct device *dev)
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{
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IRQ_CONNECT(IRQ_SPI1, CONFIG_SPI_1_IRQ_PRI,
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IRQ_CONNECT(CONFIG_SPI_1_IRQ, CONFIG_SPI_1_IRQ_PRI,
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spi_mcux_isr, DEVICE_GET(spi_mcux_1), 0);
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irq_enable(IRQ_SPI1);
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irq_enable(CONFIG_SPI_1_IRQ);
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}
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#endif /* CONFIG_SPI_1 */
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@ -316,7 +316,7 @@ static void spi_mcux_config_func_1(struct device *dev)
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static void spi_mcux_config_func_2(struct device *dev);
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static const struct spi_mcux_config spi_mcux_config_2 = {
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.base = DSPI2,
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.base = (SPI_Type *) CONFIG_SPI_2_BASE_ADDRESS,
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.clock_source = DSPI2_CLK_SRC,
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.irq_config_func = spi_mcux_config_func_2,
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};
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@ -333,9 +333,9 @@ DEVICE_AND_API_INIT(spi_mcux_2, CONFIG_SPI_2_NAME, &spi_mcux_init,
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static void spi_mcux_config_func_2(struct device *dev)
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{
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IRQ_CONNECT(IRQ_SPI2, CONFIG_SPI_2_IRQ_PRI,
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IRQ_CONNECT(CONFIG_SPI_2_IRQ, CONFIG_SPI_2_IRQ_PRI,
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spi_mcux_isr, DEVICE_GET(spi_mcux_2), 0);
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irq_enable(IRQ_SPI2);
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irq_enable(CONFIG_SPI_2_IRQ);
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}
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#endif /* CONFIG_SPI_2 */
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