Commit: 8a255eaf39d3e1a170297fc59c4674c080f99db8
broke flow control initialization.
This PR adds missing:
- GPIO initialization for RTS and CTS.
- RTS and CTS pins assignment for flow control.
- Function for setting default hight state for TXD and RTS pins.
In addition obsolete cast to void has been removed.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
For the native_posix board, implement the new get_entropy_isr call.
The old native get_entropy was already safe for ISRs, so we just
add a wrapper to it.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Adds support for configuring the CS toggling delay and using a
different device ID so that compatible flash chips can also be
used by this driver.
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdtech.com>
Adds a translation layer to make the nrfx driver for nrf52 PWM
peripheral accessible via the Zephyr's API.
Signed-off-by: Justin DeMartino <jdemarti@gmail.com>
The following dependency loop existed:
config SPI_SLAVE
bool
(Defined at drivers/spi/Kconfig:27)
...is selected by...
config SPI_2_NRF_SPIS
bool
select SPI_SLAVE
(Defined at drivers/spi/Kconfig.nrfx:210)
...is in the choice...
choice
bool
depends on SPI_2
(Defined at drivers/spi/Kconfig.nrfx:192)
...that depends on...
config SPI_2
bool
depends on SPI_SLAVE
(Defined at
arch/x86/soc/intel_quark/quark_se/Kconfig.defconfig.series)
...that again depends on SPI_SLAVE
(This might not be a problem in practice, but it'd be difficult to
detect.)
I think the underlying issue is that SPI_2_NRF_SPIS 'select's SPI_SLAVE,
while SPI_2 'depends on' it.
Fix it by having SPI_2_NRF_SPIS 'depend on' SPI_SLAVE as well. This will
require SPI_SLAVE to be explicitly enabled before SPI_2_NRF_SPIS can be
enabled.
No configuration files in Zephyr itself seem to currently enable
SPI_2_NRF_SPIS (and it defaults to n), so no tweaks should be needed
there.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
_impl_rtc_(enable|disable) does not return a value while
Z_SYSCALL_HANDLER(rtc_(enable|disable)) expects to return a value.
Signed-off-by: Olivier Martin <olivier.martin@proglove.de>
This commit adds support for Microsemi Mi-V RISC-V softcore CPU
running on the M2GL025 IGLOO2 FPGA development board.
signed-off-by: Karol Gugala <kgugala@antmicro.com>
This commit moves code from fe310 platform into RISC-V privilege common
folder. This way the code can be reused by other platforms in future.
signed-off-by: Karol Gugala <kgugala@antmicro.com>
RISC-V qemu does not use PLIC controller, so plic.c file fails to
compile with qemu target. This change disables plic if qemu is
chosen.
signed-off-by: Karol Gugala <kgugala@antmicro.com>
SDA and SCL pins can now be configured through DTS.
Pins on development kits have been assigned according to arduino
headers.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
Changes add a translation layer to make nrfx TWI and TWIM drivers
work with Zephyr API.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
As part of HAL_CAN_Init we check the initial state of the can handle.
Setting it to HAL_CAN_STATE_RESET as an initial state to start the
Init properly.
Resolves: #8416
Coverity-CID: 186580
Signed-off-by: Sritej Kanakadandi Venkata Rama <sritej.kvr@gmail.com>
Added CONFIG_USB_DW_USB_2_0
Updated global configuration register to use UTMI 16 bit PHY
Updated device configuration register to use High Speed
Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
As not all controllers using DW usb doesn't inherit
the qmsi related header, use of QM_USB_MAX_PACKET_SIZE,
QM_USB_IN_EP_NUM and QM_USB_OUT_EP_NUM break the build
for such platform. Hence defined new macros and corresponding
change done in driver.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Condition:
depends on ((SOC_SERIES_NRF52X || SOC_SERIES_NRF51X) && (!SOC_NRF52810))
for displaing configuration for UART0 peripheral has been replaced with:
depends on HAS_HW_NRF_UART0.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Attempts to clear/invalidate caches which are disabled lead to BUS
FAULTS.
Ensure they are enabled before using them.
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
What needs to be done for the cache to work properly:
* Make sure cache operations are aligned to 32B
* Make sure to clean and invalidate the operations on gmac descriptors
(thus all the helper functions)
This commit is needed for SAM GMAC to work when caches are enabled and
MPU mapping is changed to cacheable (See #8185)
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
The various STM32 reference manuals sometimes define the USB endpoints
as IN or OUT only and sometimes as bidirectional, even in the same
manual. This is likely because the OTG implementation has one set of
registers for the IN endpoints and one other set for OUT endpoints.
However at the end a given endpoint address can both transmit and
receive data.
This causes some confusion how to declare the endpoints in the device
tree, and depending on the SoC, they are either the same number of IN
and OUT endpoints declared, or they are declared as bidirectional. At
the end it doesn't really matter given how the driver uses those values:
#define NUM_IN_EP (CONFIG_USB_NUM_BIDIR_ENDPOINTS + \
CONFIG_USB_NUM_IN_ENDPOINTS)
#define NUM_OUT_EP (CONFIG_USB_NUM_BIDIR_ENDPOINTS + \
CONFIG_USB_NUM_OUT_ENDPOINTS)
#define NUM_BIDIR_EP NUM_OUT_EP
This patch therefore cleanup the driver, the DTS, and the DTS fixups to
only define the number of bidirectional endpoints.
In addition to the cleanup, that fixes a regression introduced by commit
52eacf16a2 ("driver: usb: add check for endpoint capabilities"), which
introduced a wrong check for SoC only defining the number of
bidirectional endpoints.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit enables CAN on the STM32L432.
Tested on nucleo l432ck with external transceiver and loopback mode.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
This commit splits the common interrupt into rx and tx parts because
only STM32F0 series has a common interrupt.
Moved clock source definition to device-tree.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
In order to ease integration of new series, remove reference to
series in code activation. Use LPUART support Kconfig symbol instead.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove reference to SoC series in activation of TEACK/REACK flags
checks. Use flags definitions instead which is defined, if supported,
in STM32Cube packages.
Decouple the checks since REACK is not supported in some series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The nrfx uart driver will get stuck in uart_poll_out function since
the uart_console driver has been initialized at PRE_KERNEL_1 level
and is making calls to the uart driver before the uart driver has been
initialized.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
When using CONFIG_MULTITHREADING=n, the semaphore primitives are
non-functional and useless. Remove their usage when this option is
enabled.
Signed-off-by: Johannes Hutter <johannes@proglove.de>
This symbol will be added by
https://github.com/zephyrproject-rtos/zephyr/pull/7915.
Having it in there doesn't hurt that much by itself (undefined symbols
default to 'n'), but I'm about to turn references to undefined Kconfig
symbols turn into an error.
Remove the reference.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
To enable for easier testing, replace direct use of registers
from Nordic's nrfx MDK with accesses via its HAL inlined functions
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
To enable for easier testing, replace direct use of registers
from Nordic's nrfx MDK with accesses via its HAL inlined functions
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
To enable for easier testing, replace direct use of registers
from Nordic's nrfx MDK with accesses via its HAL inlined functions
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
When using CONFIG_MULTITHREADING=n, the semaphore primitives are
non-functional and useless. Remove their usage when this option is
enabled.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Initiate a SimpleLink WiFi Driver, implemented to the WiFi management
offload APIs for scan, connect, disconnect.
Also registers the DHCP-obtained IPv4 address upon connect.
This was validated on a cc3220sf_launchxl using the wifi
shell module from the Zephyr shell_module sample.
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Add function to check capabilities of an endpoint.
Only basic properties are checked, especially on STM32
capabilities of different USB controller configurations
have to be considered in the future.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
CONFIG_SPI_FLASH_W25QXXDV_MAX_DATA_LEN is a left-over from old SPI API
usage. Now, there is no limit (besides the flash size) in SPI data
transaction.
Fixes#8327
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This adds basic support for declaring gpio nodes in dts for nrf52.
The dts.fixup provides mapping for the generated defines to the config
defines currently used by the nrf gpio driver.
Existing boards that use nrf52 are updated.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
This makes it easier to distinguish them from "true" undefined symbols.
Internally, all int/hex literals are treated as undefined symbols, which
always get their name as their value. The C tools work the same way.
The plan is to turn references to undefined Kconfig symbols into an
error later.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
These cases weren't caught by the heuristic used by the warning added in
commit 6eabea3a7e ("Kconfiglib: Warn for unquoted string defaults"),
because "GPIO_0" has no lowercase characters in it.
Unquoted Kconfig values are are indistinguishable from reference to
(undefined) symbols in general. Quoting all string defaults will help
find "true" references to undefined Kconfig symbols, and makes it
clearer that the value is constant.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
These symbols were removed by commit 4e8f29f319 ("gpio: Refactor the
mcux gpio driver to use dts"). The settings should come from DTS now.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Add support for specifying the clock prescaler value for the HF timer
used for generating the PWM signals. This allows for lower timer
frequency and thus slower PWM signals (e.g. for use as servo
controller).
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The nRF5x HF timer base frequency is 16 MHz, not 16777216 Hz.
The improved accurracy of the PWM signal was verified with an
oscilloscope on a BBC micro:bit.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
stm32cube SDK provides defines for IRQ line numbers.
It was not possible to use them, since enum where not supported
by IRQ_CONNECT macro.
Use them in order to get rid of zephyr manually coded IRQ lines.
They will later be replaced by device tree definitions when
made available
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
stm32cube SDK provides defines for IRQ line numbers.
It was not possible to use them, since enum where not supported
by IRQ_CONNECT macro.
Use them in order to get rid of zephyr manually coded IRQ lines.
They will later be replaced by device tree definitions when
made available
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
UART driver renamed to keep the same convention as SPI and TWI drivers.
All substrings: "UART_NRF5" in defines renamed to "UART_NRFX_UART".
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Replace all register defines and calls with Nordic nrfx HAL.
Simplification of uart shim - assumed only one uart instance.
Added parity bit to configuration options.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Add fixup info for PWM nodes on STM32F0/F1/F3/F4/L4 and remove the
conflicting Kconfig symbols to fully switch STM32 PWM to device tree.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
The nucleo_f334r8 uses STM32F3_PINMUX_FUNC_PA8_PWM1_CH1 inside its
pinmux but it is not defined anywhere.
Add the definition into the pinmux file to fix the build of
nucleo_f334r8 when enabling CONFIG_PWM.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
CONFIG_CLOCK_STM32_APB2_PRESCALER does not exist for STM32F0 as it was
removed from the RCC Kconfig by commit d0678201c3 ("drivers:
clock_control: provide support for stm32f0."). This will break the PWM
driver if compiled for STM32F0.
Conditionally disable usage of this symbol for STM32F0 as all PWMs are
on APB1 for this family.
Signed-off-by: Florian Vaussard <florian.vaussard@gmail.com>
