In general synchronisation between memory and the instruction cache
should be done explicitly, for example this is how it is done for RAM.
It is also done that way for flash writes in the current STM32 flash
driver.
However in case of flash erases, the current STM32 flash driver flushes
the i-cache. It probably doesn't make a big difference for the
Cortex-M3/M4 families as the cache is very small. That said it might
have bigger impact on families based on Cortex-M7 as it has between 4KB
and 16KB of i-cache, that will be added latter in this patch serie.
This patch therefore remove the i-cache flush in
flash_stm32_flush_caches.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This reduces the amount of #ifdef and keep all of them at the same
place. The empty function is then optimized-out by the compiler.
At the same time change the negative test by a positive one to simplify
adding new entries.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The timeout handling in the STM32 flash driver is currently a counter
in the busy check loop. This doesn't scale well across the whole STM32
family:
- The duration of the loop depends on the CPU speed, the activation of
caches.
- The duration of the longest flash operation (a sector erase as the
driver doesn't support mass erase) can varies a lot mostly depending
on the sector size, 2K on F0 and L4 families or 128K on the F4 family.
In addition the timeout can change depending if the writing thread is
prempted or not.
Fix that by defining a timeout in ms depending on the family, and using
k_uptime_get to get a precise measurement of the time.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
STM32 uart Kconfig instance flags were not following
same naming scheme than other drivers (i2c, spi, ..)
Update driver to use UART_X instead of UART_STM32_PORT_X
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Moving towards serialized fragmentation, adapting mac command creation
to avoid the need of ll_reserve etc...
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
There is no need to reserve any space for each frag, as the l2 will
allocate a frag for the ethernet header, arp will do the same.
This is one step further to removing the concept of ll reserve.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
I2C transfers could simultaneous be called that would
cause an inconsistent state in NRFX I2C state (and HW).
The NRFX TWI driver would expect to be in state
`NRFX_DRV_STATE_INITIALIZED` while being in state
`NRFX_DRV_STATE_POWERED_ON`.
Signed-off-by: Olivier Martin <olivier.martin@proglove.de>
Improve initialization of the ADC.
After initialization with the default values, the clock source
of the ADC is asynchronous clock (ADACK) and clock divide ratio
is 8. The minimum conversion clock frequency is 1MHz.
Add clock divider selection and set default divide ratio to 1.
That sets the conversion clock frequency to approximately 5MHz.
Default configuration for the voltage reference is set to
external pins V_REFH and V_REFL. Depending on the MCU configuration
V_REFL may be connected to ground and V_REFH to VREF_OUT.
Since Voltage Reference block is not supported, the ADC does not work
properly on FRDM-KW41Z. Add voltage reference selection to fix it.
Enable self-calibration function as recommeded in Reference Manual.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
This definition was needed to translate the old symbol used in MDK
for accessing the GPIO peripheral in nRF51 SoCs (NRF_GPIO) to the
one used for all newer SoCs (NRF_P0). Now the translation is done
in the HAL for GPIO (nrf_gpio.h).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In order to make use of the configurable bus width and burst size
options in memcpy mode, lets add configurations bits for the same.
This configuration is derived from the TRM of STM32F446xx Page No. 210
"Memory-to-memory mode" section and verified on 96Boards STM32 Sensor
Mezzanine board.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This patch fixes a bug in System timer driver where
the sys_clock_disable() function was enabling the
timer instead of disabling it.
Change-Id: I4a667d30d43d1f84094d074241ee18d7bb2b2565
Signed-off-by: David Vincze <david.vincze@arm.com>
The introduction of -fno-common caused a link error in eswifi driver due
to lack of missing extern on eswifi_bus_ops_spi. Adding the extern
resolves the link error.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert lis2mdl magnetometer driver to get the device name as well
as i2c slave information from device tree. Updates the build_all
test accordingly.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
We were reading gPTP header from wrong position when parsing
it in RX and TX.
Fixes#11827
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
This driver introduces an emulated LCD display for the native POSIX
board. The emulated display driver makes use of SDL2 to render the
displays frame buffer into a dedicated desktop window.
Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
Clear SSD1673 display during display driver initialization instead of
triggering clear via setting contrast.
Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
Do not initialize reset gpio on KW2XD SIP.
Modem's clock output is used by the SoC for the PLL.
Initialization of the reset gpio may result in the reset of the modem
and the crash of SoC.
Keep reset gpio low until modem initialization.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Fix overwrites update of indirect register.
Since the indirect register should be updated,
the parameter dreg should be false.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
If initialization fails, zero the API struct so that
device_get_binding() can't fetch it, and do not mark
the driver object as initialized to user mode.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
