Commit graph

29,268 commits

Author SHA1 Message Date
Francois Ramu
30fd0228ae drivers: dma of the stm32 refactored macro for the dma-cells
The macro to set the element of the dma-cells for each peripheral
are defined in the dma_stm32 header file
and used in the periph driver (as dma client)

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-07-22 04:52:53 -04:00
Francois Ramu
dcefbd67ed drivers: dma: stm32 dma driver for a new dma version
This is the dma V2bis which is particular DMA V2 instance for
stm32F1 and STM32L1 soc series. This DMA does not use the dma slot
Otherwise it is similar to version V2.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-07-22 04:52:53 -04:00
Francois Ramu
6312b7383d drivers: dma: stm32 dma driver using DT compat macro
Controlling the DMA offset  for the request, relies on the
dma version different from V1

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-07-22 04:52:53 -04:00
Scott Worley
d3f6b54f8e Microchip: MEC172x clock control driver
Implement a clock control driver for Microchip MEC172x handling
configuring the 32 KHz input sources for the PLL and peripheral-32k
clock domains. MEC172x differs from MEC152x. MEC152x had one 32K source
for both PLL and peripherals. MEC172x allows the two domains to use
independent 32 KHz sources. Device tree updated to provide addresses
of hardware used by the driver.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-07-21 17:46:07 -04:00
Alexander Wachter
f87135bbee drivers: clock_control: clock_stm32g4: Fix ifdef STM32_LSE_CLOCK
the macro STM32_LSE_CLOCK is always defined and therefore systems
without lse crystals hang on startup.
Used #if instead of #ifdef.

Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
2021-07-21 06:29:31 -04:00
Yuriy Vynnychek
15818a8245 drivers: serial: introduce new Telink B91 Serial driver
Serial driver basic support for new Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Yuriy Vynnychek
6c76b416ee drivers: pinmux: introduce new Telink B91 Pinmux driver
Pinmux driver basic support for new Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Yuriy Vynnychek
215cdc7a3c drivers: gpio: introduce new Telink B91 GPIO driver
GPIO driver basic support for new Telink B91 platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Sylvio Alves
e01f18441e intr: esp32: conf log default level
Only enable interrupt allocator logs if config is set

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-07-20 20:01:47 -04:00
Sylvio Alves
e57e6dc7cf drivers: flash: esp32: Add cache flush and guard calls
Add cache flush and guard calls in write and
erase api.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-07-20 20:01:35 -04:00
Dino Li
ce7c7bb5f9 it8xxx2: intc: protect interrupt enable registers of soc
Because these two functions are called from threads and ISR.
And they run a bit-wise OR operation on the interrupt registers.
So protect them to prevent race condition between thread and ISR
context where causing an interrupt won't enable as expected.

eg.
- Pseudo code of thread enable IER1's bit1:
1. load word from IER1 (0x40) and write into CPU register S1
   => S1=0x40
2. Or S1's bit1
   => S1=0x42
(But if an interrupt is triggered here)
3. Store word to IER1 from S1
   => IER1=0x42
(IER1 will be 0x42 not 0x43, IER1's bit0 is disable again due to the
race condition above)

-Pseudo code of ISR enable IER1's bit0
1. load word from IER1 (0x40) write into CPU register S2
   => S2=0x40
2. Or S2's bit0
   => S2=0x41
3. Store word to IER1 from S2
   => IER1=0x41
4. Go back to thread.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2021-07-20 20:00:39 -04:00
Alexander Wachter
2daad1dab9 drivers: sensors: Add driver for LM75
This commit adds a driver implementation for the LM75 I2C temperature
sensor.

Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
2021-07-20 16:15:32 -05:00
Crist Xu
04ab2400e6 driver: adc: an adc driver for rt1170
reuse the lpc's lpadc driver for rt1170, modify the dts and add
some macro to shield some code of LPC series. Also add the
board support inside the tests/drivers/adc/adc_api/src/test_adc.c,
and a dts node:zephyr,user inside
samples/drivers/adc/boards/mimxrt1170_evk_cm7.overlay

Signed-off-by: Crist Xu <crist.xu@nxp.com>
2021-07-20 13:15:58 -05:00
Daniel Leung
f7d82da541 timer: hpet: convert register access to functions
This converts register access from macro to functions.
This allows SoCs to override these functions if needed.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-07-20 13:35:14 +02:00
Daniel Leung
b9cc043434 timer: hpet: don't force TIMER_READS_ITS_FREQUENCY_AT_RUNTIME
This allows the HPET timer to use kconfig to specify clock
frequency instead of relying on calculation at runtime.
When the frequency is known at build, this allow the toolchain
to optimize some calculations.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-07-20 13:35:14 +02:00
Daniel Leung
fc5f698551 timer: hpet: allow overriding MIN_DELAY
This renames MIN_DELAY to HPET_CMP_MIN_DELAY, and also allows it
to be overridden. The default delay is for HPET with relative
high frequency, and may not suitable for all HPET
implementations.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-07-20 13:35:14 +02:00
Daniel Leung
aadcd10a6e timer: hpet: extract Counter Clock Period into a macro
This extracts the hard-coded value into a macro which can be
overridden. This is in preparation for SoCs where the period
is not in femptoseconds.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-07-20 13:35:14 +02:00
Simon Guinot
4de1b6be21 led_strip: ws2812: claim compatibility with Everlight B1414
This patch states that the Everlight B1414 LED controller is compatible
with the Worldsemi WS2812. Some information about it is added to the
WS2812 DT binding and driver Kconfig files.

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2021-07-20 13:35:02 +02:00
Simon Guinot
dc92d1d559 led_strip: ws2812: use k_usleep() for reset delay
Since this driver is working reliably, let's use k_usleep() instead of
k_busy_wait() (as suggested in a TODO comment) to latch and reset the
LED strip controller.

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2021-07-20 13:35:02 +02:00
Simon Guinot
17c0ddfe9c led_strip: ws2812: allow to configure reset delay
Some devices compatibles with the WS2812 IC have a different reset/latch
delay.

This patch introduces the "reset-delay" optional property for the WS2812
DT binding and adds support to the ws2812_spi driver. This new property
allows to configure the reset/latch delay of a WS2812 compatible LED
strip controller from its DT node.

If omitted the driver uses 8 microseconds by default (which is good for
the WS2812 IC).

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2021-07-20 13:35:02 +02:00
Simon Guinot
4ada0bbd6e led_strip: ws2812: allow to configure channel mapping
Some devices compatibles with the WS2812 IC have a different channel to
color mappings (e.g. RGB, BGR, RGBW, etc).

This patch introduces the "color-mapping" required property for the
WS2812 DT binding and adds support to the ws2812_gpio and ws2812_spi
drivers. This new property allows to configure the color to channel
mapping of a WS2812 compatible LED strip controller from its DT node.

Since this property also allows to know if a white channel is available,
then this patch removes the "has-white-channel" property.

Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
2021-07-20 13:35:02 +02:00
Krzysztof Chruscinski
c44a46f1f5 drivers: serial: nrfx_uarte: Fix race condition in async isr
When DMA switches from one buffer to another ENDRX followed by
RXSTARTED is generated. Code flow assumes that ENDRX will be
handled before RXSTARTED but this may not be the case if there
is a short between ENDRX and RXSTARTED and event occurs after
ENDRX event check but before RXSTARTED event check. In that case,
RXSTARTED event is handled first. Such case may happen if there
is a higher priority interrupt that may preempt UARTE interrupt
handler.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-07-20 13:31:25 +02:00
Andrzej Głąbek
7cae49d22c drivers: clock_control_nrf: Add configuration of HFCLKAUDIO frequency
Add a new property to the "nordic,nrf-clock" binding to allow
configuration of the HFCLKAUDIO frequency.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-07-20 10:13:56 +03:00
Maureen Helm
ceacc177ef drivers: gpio: Refactor mcux lpc driver to use DT_INST_FOREACH
Refactors the mcux lpc driver to use DT_INST_FOREACH_STATUS_OKAY instead
of hardcoding each instance. Tested with samples/basic/button and
samples/basic/blinky on mimxrt685_evk_cm33.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-07-19 20:00:54 -04:00
Kumar Gala
f829697931 drivers: i2c: rcar: Fix possible compiler warning
In certain build cases we get the following compiler warning:

i2c_rcar.c: In function 'i2c_rcar_transfer_msg':
i2c_rcar.c:168:6: warning: 'ret' may be used uninitialized in
                  this function [-Wmaybe-uninitialized]

Fix this by initializing ret to 0 at start of function.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-07-19 17:54:38 +02:00
Jedrzej Ciupis
a55c0b0531 drivers: ieee802154: align with API changes
This commit aligns the nRF5 ieee802154 driver with the latest
API changes necessary to handle security-related flags properly.

Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
2021-07-19 18:15:56 +03:00
Krzysztof Chruscinski
482fae74a8 drivers: timer: nrf_rtc_timer: Fix race condition
RTC interrupt was reading CC value and passing it to the handler.
However, higher priority interrupt could preempt RTC interrupt
and set new CC value. In that case CC value read in the RTC
interrupt context was not the one that triggered the interrupt.
Added fallback to COUNTER value if that case is detected.

Using COUNTER is not as precise as CC because it returns time
when event was handled and not when event occured but it is the
only option since CC value is overwritten.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-07-19 12:02:27 +02:00
Johann Fischer
8cbef2da24 drivers: console: update USB_UART_CONSOLE description
Remove outdate text and add note what the option in
the console driver does.

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2021-07-19 04:02:07 -04:00
Gerson Fernando Budke
3771b968f0 drivers: eth: sam: Replace constants by devicetree values
The zephyr sam gmac driver don't get register address and, in some
cases, peripheral id from devicetree.  This replace headers constants
in favor of devicetree values.

This fix wrong Atmel SAME7x/SAMV7x gmac register address and add
missing peripheral id property for SAM family.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-07-16 21:34:43 -04:00
Gerson Fernando Budke
49eb184ea4 dts: eth: sam: Split generic GMAC compatible
The current GMAC compatible not allow especialize properties by SoC
family.  Split current generic Atmel GMAC compatible into two new
compatibles which are defined by SoC families.  This increase the
freedom and avoid odd situations.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-07-16 21:34:43 -04:00
Carlo Caione
bc30598456 drivers: syscon: Add generic syscon API
A syscon device is a device managing a memory region containing a set of
registers that are not cohesive enough to represent as any specific type
of device. We need a driver for that because several other drivers could
use the same region at the same time and we need to io-map the region at
boot for MMU enabled platforms.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-07-16 21:31:38 -04:00
Sylvio Alves
4d37aa828a driver: wifi: add esp event task name
When enabling shell and retrieving thread information,
esp wifi event task name was empty.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-07-16 18:59:57 -04:00
John Kjellberg
0647b2e0a8 disk: Add support for MCUs with SDIO drivers.
Use abstracted define to cover more MCUs.

Signed-off-by: John Kjellberg <kjellberg.john@gmail.com>
2021-07-16 18:57:17 -04:00
Mahesh Mahadevan
5c818f7f55 drivers: counter: Add counter for rt600
Add a RTC based counter for MXRT600

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-07-16 18:56:15 -04:00
Erwan Gouriou
04e70a482d drivers/gpio: stm32: Move gpio_stm32_configure to void
No check is done on this function,
so no error can be returned.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-07-16 07:21:07 -04:00
Erwan Gouriou
b26a898705 drivers/gpio: stm32: Move driver initialization to PRE_KERNEL_1
Assuming gpio devices are required by pinmux which is used
by any device make it a device that is initialized in preliminary
steps of platform init.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-07-16 07:21:07 -04:00
Erwan Gouriou
7e8c497d40 drivers/pinmux: stm32: Group gpio devices usability checks
Move GPIO devices clock handling in stm32_pin_configure function
which is also used in stm32_setup_pins.
Additionally, add device usability check to be sure gpio driver
was initialized before being used by pinmux pseudo driver.

Last, going from the assumption that GPIO devices should be
initialized before being used by pinmux, then there is no need
to enable clock in case CONFIG_PM_DEVICE_RUNTIME=n.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-07-16 07:21:07 -04:00
Glauber Maroto Ferreira
c5361d2416 esp32: interrupt_controller: clean redundant configs
Remove config entries now selected on SoC definition.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-16 07:19:28 -04:00
Glauber Maroto Ferreira
35c8cb7b37 esp32: drivers: interrupt_controller: review SPI interrupt usage
Review SPI interrupt allocation usage.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-16 07:19:28 -04:00
Glauber Maroto Ferreira
378278f61d esp32: drivers: interrupt_controller: review I2C interrupt usage
Review I2C interrupt allocation usage.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-16 07:19:28 -04:00
Glauber Maroto Ferreira
4108ca1060 esp32: drivers: interrupt_controller: review GPIO interrupt usage
Review GPIO interrupt allocation usage.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-16 07:19:28 -04:00
Glauber Maroto Ferreira
57bf89d65e esp32: drivers: interrupt_controller: review UART interrupt usage
Review UART interrupt allocation usage.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-16 07:19:28 -04:00
Glauber Maroto Ferreira
0cf0830ead esp32: drivers: interrupt_controller: review WDT interrupt usage
Review WDT interrupt allocation usage.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-16 07:19:28 -04:00
Glauber Maroto Ferreira
b6d61587c2 esp32: drivers: interrupt_controller: review Timer's interrupt usage
Review Timer interrupt allocation usage.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-16 07:19:28 -04:00
Glauber Maroto Ferreira
9ae5fd1b34 esp32: drivers: interrupt_controller: add interrupt allocation support
Add interrupt allocation support for ESP32.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-07-16 07:19:28 -04:00
Fabio Baltieri
accb71ec9e drivers: sx126x: add support for the stm32wl chip
Add support for the STM32WL integrated radio, based on the sx1262. The
STM32WL implementation does not use any GPIO, and the signals are routed
to other units of the SoC and accessed with the ST HAL.

Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
2021-07-15 21:30:28 -04:00
Fabio Baltieri
2916133b06 drivers: sx126x_standalone: convert to gpio_dt_spec APIs
Convert the standalone part of the sx126x driver to the new gpio_dt_spec
APIs. This allows moving the specific GPIOs in that part of the driver
and out of struct sx126x_data.

Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
2021-07-15 21:30:28 -04:00
Fabio Baltieri
74efaa920a drivers: sx126x: refactor few functions for stm32wl support
Move few functions around in preparation of adding the STM32WL variant
of the driver.

Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
2021-07-15 21:30:28 -04:00
Fabio Baltieri
624886156a drivers: spi_ll_stm32: add SUBGHZSPI support
This adds support for controlling the SUBGHZSPI NSS line in STM32WL
devices. This is a special dedicated SPI port only connected to the
radio device internally, chip select happens through a bit in the PWR
module. Adding a special dt-property to identify the port, it all gets
built out on non-WL devices.

Deduplicate the existing dts bindings in the process, and add the new
one for the special spi with the new property.

Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
2021-07-15 21:30:28 -04:00
Sylvio Alves
c58a218720 drivers: i2c: fix timing and stop bit
Current impĺementation fails due to missing stop bit
when reading data. This fixes it and refactor the implementation
by adding k_busy_wait when waiting I2C bus completion.

Also, this implementation is based on esp-idf v3.0.
It will be refactored based on latest esp-idf v4.3 using proper
low level calls.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>

Fixes #34015
2021-07-15 19:28:16 -04:00