Commit graph

23353 commits

Author SHA1 Message Date
Ulf Magnusson
d7fa8b25aa drivers: pinmux: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.

This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-07-03 17:11:31 -04:00
Ulf Magnusson
bfed59c1d4 drivers: led: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.

This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-07-03 17:11:31 -04:00
Ulf Magnusson
7cdd946d2d drivers: usb: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.

This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-07-03 17:11:31 -04:00
Ulf Magnusson
cddca70860 drivers: rtc: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.

This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-07-03 17:11:31 -04:00
Ulf Magnusson
f7b441a8af drivers: grove: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.

This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-07-03 17:11:31 -04:00
Ulf Magnusson
13cb4cbb5f drivers: interrupt_controller: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though, and is
inconsistent.

This will make the auto-generated Kconfig documentation have "No
defaults. Implicitly defaults to n." as well, which is clearer than
'default n if ...'

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-07-03 17:11:31 -04:00
Paul Sokolovsky
ec6b6c9f0c eth: mcux: Add an option for randomized, but stable MAC address
The previous default, CONFIG_ETH_MCUX_0_RANDOM_MAC, result in a random
MAC address changed each reboot. As reboots happen quite often during
development, while Ethernet peers usually cache existing MAC addresses
in ARP cache, this led to situation when a board after reboot didn't
respond to pings or any other connection attempts for random amount of
time (upo to 10-20s). This was quite confusing and looked like some
problem in driver/hardware/connection/whatever.

Instead, introduce new option, CONFIG_ETH_MCUX_0_UNIQUE_MAC, to make
MAC address from MCU unique identification register. This results in
randomized/unique MAC address which is also stable over reboots and
avoids the situation described above.

Fixes: #3187

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2018-07-03 17:07:33 -04:00
Armando Visconti
5fa89ae164 drivers: pinmux: stm32f4: Added pinmux macros for I2S master
Define the pinmuxing for I2Sx_CK, I2Sx_SD and I2Sx_WS wires (with
'x' in the range 1 to 5). The multiplexing has been selected in
accordance to the ArgonKey board requirements.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2018-07-03 12:49:03 -05:00
Daniel Egger
536d77ab51 drivers: eth: stm32: Added missing ethernet_init() call
Fixes #8668

Signed-off-by: Daniel Egger <daniel@eggers-club.de>
2018-07-03 15:43:06 +03:00
Sebastien Bourdelin
ac1a9c4ef2 drivers: led: Add LED driver support for NXP PCA9633
Add support for NXP PCA9633 an I2C 4-bit LED driver.
Supported blinkink period: 41ms to 10667ms
Supported brightness value: 0 to 100%

This driver supports the following APIs:

1. led_blink
2. led_set_brightness
3. led_on
4. led_off

Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
2018-07-02 10:25:47 -05:00
Kumar Gala
1ce259d149 drivers: i2c: nrfx: Move device tree selection to driver Kconfig
Move HAS_DTS_I2C from board to the driver Kconfig.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-07-02 09:46:22 -05:00
Jakub Rzeszutko
197740bdfe drivers: uart: nrf: fixing interrupt driven API
1. API function: uart_nrfx_irq_tx_enable is expected to enable and
trigger TXDRDY interrupt. Due to HW limiation before first byte has
been sent TXDRDY interrupt will not be triggered so it must be forced
by the software.

2. Common function: uart_nrfx_irq_tx_ready_complete is used for two
API entries: irq_tx_ready, irq_tx_complete because Nordic hardware does
not distinguish between them. This function returns 1 when driver is
ready to accept data and 0 otherwise.

3. Removed Hungarian prefixes.

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2018-07-02 10:56:57 +02:00
Anas Nashif
80e6a978a6 kernel/drivers: fix compile warnings
Uncovered by clang we have some functions being only used conditionally,
so gaurd them to make them only available when those conditions are met.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-07-01 22:58:23 +02:00
Christophe Priouzeau
b0c294ce48 bt: hci driver over spi: Configure BlueNRG-MS in controller mode
Configure BlueNRG in controller w/o host.
By disabling 'HCI_reset' via the quirk, we can request to
BluesNRG hardware to be on controller mode just after it is ready.
By the way it's no necessary to manage a 'HCI_reset' when BluesNRG are
initialised (and on controler mode).

Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2018-06-29 10:40:25 +02:00
Christophe Priouzeau
cd0a8216e9 drivers/clock_control: stm32: fix HCLK calculation when using MSI
MSI clock signal can be selected in several ranges.
These ranges should be taken into account for calculating its
frequency and hence global system frequency.
Provide a Kconfig option to set MSI range.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
2018-06-29 10:40:25 +02:00
Christophe Priouzeau
7b02e6dc55 bt: hci driver over spi: BlueNRG-MS read until IRQ pin goes low
According to BlueNRG-MS ref manual, SPI master shoul read  from
controller as long as IRQ pin is high.
Introduce a new loop within spi_rx_thread to do so. Since
it is now possible to enter read loop with nothing to read, set
a max attempts limit to be sure to exit the loop.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
2018-06-29 10:40:25 +02:00
Olivier Martin
0ba41f5b46 drivers: serial: Fix syntax error
`uart_handler.c` does not build when `CONFIG_UART_LINE_CTRL`
is defined.

Signed-off-by: Olivier Martin <olivier.martin@proglove.de>
2018-06-29 10:18:48 +02:00
Krzysztof Chruściński
5a1313f804 drivers: console: rtt: RTT session awareness
In order to avoid bytes dropping when RTT output buffer is full,
RTT session detection algorithm is introduced to the RTT console.
If host session is detected console retries after wait state
expecting host to empty the buffer. If host session is not detected
console drops the byte without retrying.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2018-06-28 09:36:58 -05:00
Yurii Hamann
75d3d94c90 drivers: interrupt_controller: stm32: STM32F7 EXTI support
This patch adds EXTI support for STM32F7 family
microcontrollers.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Yurii Hamann
1fdc790ca2 serial: stm32: STM32F7 UART support
The patch adds serial driver support for STM32F7 family
microcontrollers, includes pinmux definitions and DTS fixup file.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Yurii Hamann
7482969da6 drivers: pinmux: stm32: STM32F7 pinmux support
This patch adds pinmux header file for STM32F7 famlily
microcontrollers

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Yurii Hamann
a229500d23 drivers: gpio: stm32: STM32F7 GPIO support
This patch adds GPIO support for STM32F7 family microcontrollers.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Yurii Hamann
4df673f3fc drivers: clock_control: STM32F7 family clock control
This patch adds clock control support for STM32F7 family
microcontrollers.

Signed-off-by: Yurii Hamann <yurii@hamann.site>
2018-06-28 08:29:32 -05:00
Ulf Magnusson
19d7803546 drivers: sensor: Kconfig: Remove redundant 'default n' properties
Bool symbols implicitly default to 'n'.

A 'default n' can make sense e.g. in a Kconfig.defconfig file, if you
want to override a 'default y' on the base definition of the symbol. It
isn't used like that on any of these symbols though.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-27 17:20:10 -05:00
Tomasz Gorochowik
ff41ef477e drivers: eth: gmac: Cast to type expected by HAL
This is needed to avoid compilation warnings when using both the
built-in libc and newlib.
The warnings were caused by typedefs incompatibilities.

This was agreed to be the temporary solution at the TSC.

See #8469 for more details.

Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
2018-06-27 11:35:57 -05:00
Jukka Rissanen
8ae6bad21d net: l2: Move the layer 2 code into subsys/net/
The subsys/net/ directory is more logical place for L2 code instead
of ip/ directory. No functionality changes by this commit.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2018-06-27 17:02:59 +03:00
Alberto Escolar Piedras
9e82ef13af drivers: entropy: nrf5: Use nrf_rng hal for registers w sideeffects
A few registers with sideeffects were not using the HAL yet.
Fixed.

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-06-26 14:49:50 +02:00
Jukka Rissanen
ed25a16a3b driver: ptp_clock: PTP clock driver definition
Defines a PTP clock driver that can be implemented in those network
interface drivers that provide gPTP support.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Signed-off-by: Julien Chevrier <julien.chevrier@intel.com>
2018-06-26 12:37:28 +03:00
Jakub Rzeszutko
daef3cc5be drivers: uart: nrf: fixing hardware flow control
Commit: 8a255eaf39d3e1a170297fc59c4674c080f99db8
broke flow control initialization.
This PR adds missing:
 - GPIO initialization for RTS and CTS.
 - RTS and CTS pins assignment for flow control.
 - Function for setting default hight state for TXD and RTS pins.
In addition obsolete cast to void has been removed.

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2018-06-25 14:39:25 +02:00
Alberto Escolar Piedras
5ea637d23b drivers: entropy: native: implement standard ISR-specific call
For the native_posix board, implement the new get_entropy_isr call.
The old native get_entropy was already safe for ISRs, so we just
add a wrapper to it.

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
2018-06-22 12:29:02 -04:00
Jamie McCrae
23ce6f44b5 drivers: flash: w25qxxdv: Add options for delay and device ID
Adds support for configuring the CS toggling delay and using a
different device ID so that compatible flash chips can also be
used by this driver.

Signed-off-by: Jamie McCrae <jamie.mccrae@lairdtech.com>
2018-06-22 12:27:40 -04:00
Justin DeMartino
cfc18f2102 drivers: pwm: Add shim for nrfx PWM HW driver
Adds a translation layer to make the nrfx driver for nrf52 PWM
peripheral accessible via the Zephyr's API.

Signed-off-by: Justin DeMartino <jdemarti@gmail.com>
2018-06-22 11:56:01 +02:00
Ulf Magnusson
d930c21e12 drivers: spi: Fix SPI_2_NRF_SPIS-related dependency loop
The following dependency loop existed:

  config SPI_SLAVE
  	bool

  (Defined at drivers/spi/Kconfig:27)

  ...is selected by...

  config SPI_2_NRF_SPIS
  	bool
  	select SPI_SLAVE

  (Defined at drivers/spi/Kconfig.nrfx:210)

  ...is in the choice...

  choice
  	bool
  	depends on SPI_2

  (Defined at drivers/spi/Kconfig.nrfx:192)

  ...that depends on...

  config SPI_2
  	bool
  	depends on SPI_SLAVE

  (Defined at
  arch/x86/soc/intel_quark/quark_se/Kconfig.defconfig.series)

  ...that again depends on SPI_SLAVE

(This might not be a problem in practice, but it'd be difficult to
detect.)

I think the underlying issue is that SPI_2_NRF_SPIS 'select's SPI_SLAVE,
while SPI_2 'depends on' it.

Fix it by having SPI_2_NRF_SPIS 'depend on' SPI_SLAVE as well. This will
require SPI_SLAVE to be explicitly enabled before SPI_2_NRF_SPIS can be
enabled.

No configuration files in Zephyr itself seem to currently enable
SPI_2_NRF_SPIS (and it defaults to n), so no tweaks should be needed
there.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-06-20 15:53:38 -04:00
Olivier Martin
2b10dd8a0b drivers: rtc: Fix build
_impl_rtc_(enable|disable) does not return a value while
Z_SYSCALL_HANDLER(rtc_(enable|disable)) expects to return a value.

Signed-off-by: Olivier Martin <olivier.martin@proglove.de>
2018-06-20 15:46:09 -04:00
David B. Kinder
90380730b3 doc: fix misspelling in watchdog Kconfig
fix misspellings missed during regular review

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-06-20 12:36:48 -04:00
Karol Gugala
1765d75ff4 riscv32: riscv-privilege: Microsemi Mi-V support
This commit adds support for Microsemi Mi-V RISC-V softcore CPU
running on the M2GL025 IGLOO2 FPGA development board.

signed-off-by: Karol Gugala <kgugala@antmicro.com>
2018-06-20 11:57:07 -04:00
Karol Gugala
23a5b5d171 riscv32: riscv-privilege: integrate common code
This commit moves code from fe310 platform into RISC-V privilege common
folder. This way the code can be reused by other platforms in future.

signed-off-by: Karol Gugala <kgugala@antmicro.com>
2018-06-20 11:57:07 -04:00
Karol Gugala
5417f29def drivers: plic: do not compile plic for qemu target
RISC-V qemu does not use PLIC controller, so plic.c file fails to
compile with qemu target. This change disables plic if qemu is
chosen.

signed-off-by: Karol Gugala <kgugala@antmicro.com>
2018-06-20 11:57:07 -04:00
Mieszko Mierunski
dc1c2742b6 boards: nrf: Moved SDA and SCL pin configuration to DTS for nRF boards
SDA and SCL pins can now be configured through DTS.
Pins on development kits have been assigned according to arduino
headers.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-06-20 13:38:18 +02:00
Mieszko Mierunski
1aa61d60c5 drivers: i2c: Removed redundant i2c_nrf5 shim
After switching to TWI and TWIM drivers, old i2c_nrf5 shim
is no longer needed.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-06-20 13:38:18 +02:00
Mieszko Mierunski
1edc29c47f drivers: i2c: Add shims for nrfx TWI and TWIM drivers
Changes add a translation layer to make nrfx TWI and TWIM drivers
work with Zephyr API.

Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
2018-06-20 13:38:18 +02:00
Sritej Kanakadandi Venkata Rama
6f61f09803 drivers: can: Set a initial state to the can device before HAL_CAN_Init
As part of HAL_CAN_Init we check the initial state of the can handle.
Setting it to HAL_CAN_STATE_RESET as an initial state to start the
Init properly.

Resolves: #8416
Coverity-CID: 186580

Signed-off-by: Sritej Kanakadandi Venkata Rama <sritej.kvr@gmail.com>
2018-06-19 20:46:25 -04:00
Sathish Kuttan
1b0641e2e2 drivers: usb: Add High Speed support for DesignWare USB
Added CONFIG_USB_DW_USB_2_0
Updated global configuration register to use UTMI 16 bit PHY
Updated device configuration register to use High Speed

Signed-off-by: Sathish Kuttan <sathish.k.kuttan@intel.com>
2018-06-19 20:16:18 -04:00
Savinay Dharmappa
e682652d8c drivers: usb: Fix build error for intel_s1000.
As not all controllers using DW usb doesn't inherit
the qmsi related header, use of QM_USB_MAX_PACKET_SIZE,
QM_USB_IN_EP_NUM and QM_USB_OUT_EP_NUM break the build
for such platform. Hence defined new macros and corresponding
change done in driver.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-06-19 15:52:03 -04:00
Jakub Rzeszutko
fab8246bc5 drivers: serial: simplify Kconfig.nrfx by using HAS_HW_NRF_UART0
Condition:
depends on ((SOC_SERIES_NRF52X || SOC_SERIES_NRF51X) && (!SOC_NRF52810))
for displaing configuration for UART0 peripheral has been replaced with:
depends on HAS_HW_NRF_UART0.

Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
2018-06-19 20:02:51 +02:00
Tomasz Gorochowik
0a6046cf31 drivers: eth: gmac: Ensure caches are enabled before using them
Attempts to clear/invalidate caches which are disabled lead to BUS
FAULTS.

Ensure they are enabled before using them.

Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
2018-06-19 15:04:16 +03:00
Tomasz Gorochowik
a313e5c74f drivers: eth: gmac: Fix cache support for SAM GMAC
What needs to be done for the cache to work properly:
* Make sure cache operations are aligned to 32B
* Make sure to clean and invalidate the operations on gmac descriptors
  (thus all the helper functions)

This commit is needed for SAM GMAC to work when caches are enabled and
MPU mapping is changed to cacheable (See #8185)

Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
2018-06-19 10:48:24 +03:00
Aurelien Jarno
7688f49065 drivers: usb_dc_stm32: change all endpoints to bidirectional
The various STM32 reference manuals sometimes define the USB endpoints
as IN or OUT only and sometimes as bidirectional, even in the same
manual. This is likely because the OTG implementation has one set of
registers for the IN endpoints and one other set for OUT endpoints.
However at the end a given endpoint address can both transmit and
receive data.

This causes some confusion how to declare the endpoints in the device
tree, and depending on the SoC, they are either the same number of IN
and OUT endpoints declared, or they are declared as bidirectional. At
the end it doesn't really matter given how the driver uses those values:

    #define NUM_IN_EP (CONFIG_USB_NUM_BIDIR_ENDPOINTS + \
                       CONFIG_USB_NUM_IN_ENDPOINTS)

    #define NUM_OUT_EP (CONFIG_USB_NUM_BIDIR_ENDPOINTS + \
                        CONFIG_USB_NUM_OUT_ENDPOINTS)

    #define NUM_BIDIR_EP NUM_OUT_EP

This patch therefore cleanup the driver, the DTS, and the DTS fixups to
only define the number of bidirectional endpoints.

In addition to the cleanup, that fixes a regression introduced by commit
52eacf16a2 ("driver: usb: add check for endpoint capabilities"), which
introduced a wrong check for SoC only defining the number of
bidirectional endpoints.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2018-06-18 15:24:15 -04:00
Alexander Wachter
c601f3be67 can: Add can support for STM32L432
This commit enables CAN on the STM32L432.
Tested on nucleo l432ck with external transceiver and loopback mode.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2018-06-18 15:23:29 -04:00
Alexander Wachter
ebc31f6235 drivers: can: Prepare STM32 driver for other series than STM32F0
This commit splits the common interrupt into rx and tx parts because
only STM32F0 series has a common interrupt.
Moved clock source definition to device-tree.

Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
2018-06-18 15:23:29 -04:00