Suppress -Wchar-subscripts warnings when building with Newlib, by
casting isdigit() parameter to unsigned char.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
LPC55xxx SoCs don't allow reading erased areas, the flash memory
controller (FMC) will trigger an ECC error for that area. To prevent
reading unwritten areas the low level FMC command of margin checking is
used, this will fail if the area to be read is not correctly written
(margin_check) or area is erased (blank_check).
In the case of an erased page, we return dummy data so the application
can program that area.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
In case of dualcore, STM32H7, STM32W and STM32MP1,
protect concurrent register write access with HSEM.
Done for following drivers:
clock_control, counter, flash, gpio, interrupt_controller
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
The generic SPI GPIO chip select support now respects devicetree flags
for signal active level. This pass DT information to driver instance to
ensure proper behavior.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Unit tests were failing to build because random header was included by
kernel_includes.h. The problem is that rand32.h includes a generated
file that is either not generated or not included when building unit
tests. Also, it is better to limit the scope of this file to where it is
used.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Since the i2c init structure is moved from config_info to the stack,
this change requires 12 bytes more stack during driver initialization.
This fixes#25255
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
wifi-reset-gpios flags were not respected so far. This means that
setting reset as active low (which is required in most cases for ESP
modules/chips) was done inside esp driver with inverted logic. Use dts
flags instead, so "active low" property is configured the same way as
for other drivers (i.e. in device-tree instead of driver).
This change also allows to configure reset as active high, in case where
ESP's nRST signal is somehow inverted on the board (behaving as RST
signal instead).
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
PCI devices on 64 bit systems can be mapped anywhere, not just in the
lower 4G of memory. Remove pointer size assumptions.
Also this removes the use of a struct uart_device_config to store the
(runtime) BAR address. That struct has other stuff in it, and the
only thing we need is the single MMIO address. It's also REALLY
confusing to have two "devconf" fields in the device storing values of
the same struct type, some fields of which are used from one of them
but some from the other!
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The PCI API was originally limited to 32 bit addresses. Even though
it had code to skip over the high word in 64 bit BAR entries, it
refused to use it and returned a 32 bit value. Some devices in the
wild have default mappings from the firmware for devices above 4G.
Also remove the "iobar" API. It's dead code, we don't call it and we
don't test it. IO space BAR entries are a legacy feature from way,
way back in PCI history (I genuinely have never heard of a real device
that uses them!). And there's no difference in format between one of
these and a 32 bit "memory" BAR anyway, someone who actually had this
requirement could just use the existing API without worry.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
When checking the absolute value of cycles set to the comparator
use the MAX_CYCLES instead of MAX_TICKS.
The commit changes function names and comments to make it clear
where ticks (system ticks) and where RTC cycles are used.
Fixes#26701
Signed-off-by: Pawel Dunaj <pawel.dunaj@nordicsemi.no>
It is annoying to read just a single word at a time. Update this
command to print any amount of data. This uses byte format at present.
We could perhaps support something like:
flash read.8
flash read.16
flash read.32
to chose the size.
Example output (with line breaks to keep within git-style limit):
$ flash read FLASH_CTRL 0 20
00000000: 20 25 00 20 1d 26 00 08 69 68 00 08 45 26 00 08
| %. .&.. ih..E&..|
00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|........ ........|
Signed-off-by: Simon Glass <sjg@chromium.org>
This driver blocks on a semaphore to receive notification when an
operation is complete, so requires CONFIG_MULTITHREADING=y.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Since commit 5963ebaf33
("drivers: spi: CS configuration through devicetree")
the SPI GPIO CS flags are obtained from DT,
but the patch series has missed the necessary changes
for the ieee802154_dw1000 driver and decawave_dwm1001_dev board.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
K_FOREVER/INT_MAX number of ticks needs delay cycles value of
maximum order and exceeds 'int32' range.
The typecast to 'int32' results in wrongly evaluating the value
as less than 'MIN_DELAY' and chooses 'MIN_DELAY' over the actual
delay cycles.
Cap the 'MAX_TICKS' to INT32_MAX.
fixes: #26632
Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
Make sure to retry at least once after the timeout elapses. Sample the
current time before starting the i2c transaction, and only give up if
the polling occurred after the timeout.
The timeout exists to allow the eeprom time to complete a write, during
which time it will nack transactions (at24) or the status register will
report busy (at25). If a transaction fails legitimately, but the 1ms
sleep overshoots the timeout expiration, we will not try again, which
fails to give the part the full grace period before declaring failure.
This is likely to happen in the last 1ms interval but also possible if
the eeprom thread is preempted. It is possible to only try once and give
up if the sleep lasts longer than the timeout, which fails to give the
part an adequate period to complete the write.
Waiting until the current time is after (not equal to) the timeout is
also important because we don't want to round up partial milliseconds if
the start time was sampled near the end of a millisecond boundary. The
timeouts of eeproms can be ~5ms.
Signed-off-by: Tyler Hall <tylerwhall@gmail.com>
A call to atomic_set_bit_to() was used for clearing bits in an atomic_t
variable that stores information about allocated GPIOTE channels.
This caused an issue to be reported by Coverity, as the function treats
its first parameter as an array and it was provided with a pointer to
a singleton.
This commit replaces that call with atomic_and(), to prevent the issue
from being reported and for consistency with the way bits are set for
allocated GPIOTE channels (what is done with a call to atomic_or()).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The STOPTX task cannot be triggered directly in the function that
disables TX interrupt because this task stops the UART transmitter
immediately, even if it is in the middle of shifting out a byte.
Instead, this task needs to be triggered in the interrupt handler,
when the end of transmission is signaled.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
To keep the bus fully loaded, the SAM0 has a fast path that recognises
special cases like TX only, RX only, or TX/RX of the same size.
Commit #ea2431f32f accidentally disabled this.
This increases the utilisation from around 30 % to around 90 % at 48
MHz.
Signed-off-by: Michael Hope <mlhx@google.com>
The SAM0 has a data register and a shift register. Data that is
written to the data register is transferred to the shift register by
the peripheral.
On the SAMD51, the CPU is fast enough that the first data write hasn't
been transferred to the shift register by the time the next data write
occurs, causing the second write to be dropped, causing the receiver
to wait forever.
Fix by spinning until the data register is empty.
Signed-off-by: Michael Hope <mlhx@google.com>
The gd7965 driver still called ksleep with unsigned integers.
Use the K_MSEC makro instead.
Signed-off-by: Tobias Schaffner <tobiasschaffner87@outlook.com>
Adds the chip select devicetree flags to the spi_cs_control instance.
ISM43362 chip select is ACTIVE_LOW.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
Fix host RX thread being deadlocked. The deadlock occurs because the
RX thread is stuck waiting in conn_tx_alloc with K_FOREVER but if the
connection is disconnected only the RX thread can unblock it in the
handling of the disconnect event.
This commit fixes this deadlock by splitting the processing of the
disconnected event into two parts.
The part needed to unblock the RX is to release resources held by
unack'ed TX packets and mark the connection state as not connected
anymore.
The RX thread waiting for free_tx fifo and the TX thread waiting for
the bt_dev.le.pkts semaphore will both check the connected state after
having acquired them and will abort if disconnected.
The rest of the processing will be handled at normal RX thread
priority like normal.
Move the bt_recv_prio handling to the Bluetooth host when the host
has defined its own RX thread (CONFIG_BT_RECV_IS_RX_THREAD=n).
If the HCI driver has the RX thread (CONFIG_BT_RECV_IS_RX_THREAD=y),
then the responsibility to call bt_recv and bt_recv_prio correctly
falls to the HCI driver.
The helper function bt_hci_evt_is_prio() is replaced with
bt_hci_evt_get_flags() so that the HCI driver can do this correctly.
This decision to replace was made so that existing HCI drivers
maintained out-of-tree will fail at compile time with the new system.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Bluetooth: host: Move bt_recv_prio to host when RX thread is defined
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
We should not set PLLSRC bits here. It is done by
LL_PLL_ConfigSystemClock_* functions which are called later.
Also, PREDIV1 setting should not be restricted to HSE only.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
Add a Kconfig option for enabling the DAC test output. On the NXP
KE1xF the DAC test output is internally routed to ADCx SE23.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add support for STM32L0X using the generic STM32 backend. This is
quite a significant change since the L0 series uses a slightly
different flash controller. Refactor the generic backend to better
support different block sizes and the L0's register interface.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Several STM32 chips have identical chip-specific code that has been
duplicated in different source files. Unify the F0x, F1x, and F3x to
use a single implementation.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
ringbuf claim API returns pointer to contiguous area. In cases when data
in ringbuf wraps the end of internal buffer, then single call to claim
data is not enough to get all data - there is remaining part on the
beginning of internal buffer. Those remaining bytes will need to wait
for next ISR handler to trigger workqueue. Theoretically this means that
data on the beginning of ringbuf can wait there forever, or simply to
the next timeout in PPP stack when data traffic continues.
Consume data from ringbuf in a loop, stopping only when claiming results
in empty buffer. This will make sure that there is no stale data in the
ringbuf.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Claimed ringbuf bytes were parsed until first frame was detected, but
remaining data in the claimed area was just ignored / lost.
Continue parsing bytes to the end of claimed area after each detected
frame.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
CLOCK_STM32_PLL_XTPRE Kconfig symbols was made to differentiate
code between F1 soc variants with XTRE and others.
It appears that specific XTRE code handling is already in place in
LL_PLL_ConfigSystemClock_* functions that are called afterwards.
Since this piece of code is not required anymore, let's remove
the symbol.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
- Fix passive mode protocol selection depending on AT versions
- Use Kconfig value for reset timeout
- Fix bug with parsing security from scan result
- Re-order some AT commands during init due to some commands having
dependency on other commands
Signed-off-by: Tobias Svehagen <tobias.svehagen@gmail.com>
Implemented rf2xx_set_txpower() in ieee802154_rf2xx.c by mapping dBm
values to RF2XX register values.
Signed-off-by: Kari Severinkangas <kari.severinkangas@tridonic.com>
Signed-off-by: Markus Becker <markus.becker@tridonic.com>
Remove K_FOREVER wait on completion_sync.
In some situations (a short on I2C SDA line for example), this
semaphore will never be released and therefore we should not wait
it forever.
Instead we wait for a maximum of 100msec and return an error if we
weren't able to retrieve the semaphore.
In such situation, the program is not stuck anymore, but the I2C
driver must be uninit then init again to work again.
Fixes#25076.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
The driver should only call net_pkt_unref on packets that get
successfully handled, ie where send/sendto return 0. If the packet
cannot be handled, net_context layer still owns the packet and should
take care or the unref.
Signed-off-by: Tobias Svehagen <tobias.svehagen@gmail.com>
The Atmel GMAC Ethernet driver may be used by both the SAM series
(e.g. SAM E70) and SAM0 series (e.g. SAM E54) SoCs.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
When writing buffers larger then page-size, there is already a routine
that checks wrap around and adjusts offsets, but this routine was
missing incrementing the data pointer, which would results in
rewriting the same page-size bytes over and over. This adds the proper
increment code.
Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
Silence a gcc warning due to possible return of unitialized variable in
erase function. This could only happen if size == 0, which doesn't seem
likely, but initializing the variable to zero should fix the issue.
Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
