drivers: serial: ns16550: Remove reg-shift instance count assumption
The reg-shift support was quite broken in that the code only looked for this property on instance 0. Now we support the property on any node which might declare it. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
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2 changed files with 43 additions and 23 deletions
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@ -40,11 +40,15 @@
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#define INST_HAS_PCP_HELPER(inst) DT_INST_NODE_HAS_PROP(inst, pcp) ||
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#define INST_HAS_DLF_HELPER(inst) DT_INST_NODE_HAS_PROP(inst, dlf) ||
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#define INST_HAS_REG_SHIFT_HELPER(inst) \
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DT_INST_NODE_HAS_PROP(inst, reg_shift) ||
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#define UART_NS16550_PCP_ENABLED \
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(DT_INST_FOREACH_STATUS_OKAY(INST_HAS_PCP_HELPER) 0)
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#define UART_NS16550_DLF_ENABLED \
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(DT_INST_FOREACH_STATUS_OKAY(INST_HAS_DLF_HELPER) 0)
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#define UART_NS16550_REG_INTERVAL_ENABLED \
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(DT_INST_FOREACH_STATUS_OKAY(INST_HAS_REG_SHIFT_HELPER) 0)
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(pcie)
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BUILD_ASSERT(IS_ENABLED(CONFIG_PCIE), "NS16550(s) in DT need CONFIG_PCIE");
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@ -192,44 +196,32 @@ BUILD_ASSERT(IS_ENABLED(CONFIG_PCIE), "NS16550(s) in DT need CONFIG_PCIE");
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#define DEV_DATA(dev) \
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((struct uart_ns16550_dev_data_t *)(dev)->data)
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#define THR(dev) (get_port(dev) + REG_THR * UART_REG_ADDR_INTERVAL)
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#define RDR(dev) (get_port(dev) + REG_RDR * UART_REG_ADDR_INTERVAL)
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#define BRDL(dev) \
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(get_port(dev) + REG_BRDL * UART_REG_ADDR_INTERVAL)
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#define BRDH(dev) \
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(get_port(dev) + REG_BRDH * UART_REG_ADDR_INTERVAL)
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#define IER(dev) (get_port(dev) + REG_IER * UART_REG_ADDR_INTERVAL)
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#define IIR(dev) (get_port(dev) + REG_IIR * UART_REG_ADDR_INTERVAL)
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#define FCR(dev) (get_port(dev) + REG_FCR * UART_REG_ADDR_INTERVAL)
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#define LCR(dev) (get_port(dev) + REG_LCR * UART_REG_ADDR_INTERVAL)
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#define MDC(dev) (get_port(dev) + REG_MDC * UART_REG_ADDR_INTERVAL)
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#define LSR(dev) (get_port(dev) + REG_LSR * UART_REG_ADDR_INTERVAL)
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#define MSR(dev) (get_port(dev) + REG_MSR * UART_REG_ADDR_INTERVAL)
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#define THR(dev) (get_port(dev) + REG_THR * reg_interval(dev))
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#define RDR(dev) (get_port(dev) + REG_RDR * reg_interval(dev))
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#define BRDL(dev) (get_port(dev) + REG_BRDL * reg_interval(dev))
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#define BRDH(dev) (get_port(dev) + REG_BRDH * reg_interval(dev))
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#define IER(dev) (get_port(dev) + REG_IER * reg_interval(dev))
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#define IIR(dev) (get_port(dev) + REG_IIR * reg_interval(dev))
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#define FCR(dev) (get_port(dev) + REG_FCR * reg_interval(dev))
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#define LCR(dev) (get_port(dev) + REG_LCR * reg_interval(dev))
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#define MDC(dev) (get_port(dev) + REG_MDC * reg_interval(dev))
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#define LSR(dev) (get_port(dev) + REG_LSR * reg_interval(dev))
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#define MSR(dev) (get_port(dev) + REG_MSR * reg_interval(dev))
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#define DLF(dev) (get_port(dev) + REG_DLF)
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#define PCP(dev) (get_port(dev) + REG_PCP)
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#define IIRC(dev) (DEV_DATA(dev)->iir_cache)
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#if DT_INST_NODE_HAS_PROP(0, reg_shift)
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#define UART_REG_ADDR_INTERVAL (1<<DT_INST_PROP(0, reg_shift))
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#endif
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#ifdef UART_NS16550_ACCESS_IOPORT
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#define INBYTE(x) sys_in8(x)
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#define INWORD(x) sys_in32(x)
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#define OUTBYTE(x, d) sys_out8(d, x)
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#define OUTWORD(x, d) sys_out32(d, x)
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#ifndef UART_REG_ADDR_INTERVAL
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#define UART_REG_ADDR_INTERVAL 1 /* address diff of adjacent regs. */
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#endif /* UART_REG_ADDR_INTERVAL */
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#else
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#define INBYTE(x) sys_read8(x)
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#define INWORD(x) sys_read32(x)
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#define OUTBYTE(x, d) sys_write8(d, x)
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#define OUTWORD(x, d) sys_write32(d, x)
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#ifndef UART_REG_ADDR_INTERVAL
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#define UART_REG_ADDR_INTERVAL 4 /* address diff of adjacent regs. */
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#endif
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#endif /* UART_NS16550_ACCESS_IOPORT */
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#ifdef CONFIG_UART_NS16550_ACCESS_WORD_ONLY
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@ -253,6 +245,9 @@ struct uart_ns16550_device_config {
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#if UART_NS16550_PCP_ENABLED
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uint32_t pcp;
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#endif
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#if UART_NS16550_REG_INTERVAL_ENABLED
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uint8_t reg_interval;
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#endif
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#if DT_ANY_INST_ON_BUS_STATUS_OKAY(pcie)
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bool pcie;
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pcie_bdf_t pcie_bdf;
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@ -279,6 +274,27 @@ struct uart_ns16550_dev_data_t {
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#endif
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};
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#if defined(UART_REG_ADDR_INTERVAL)
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#define DEFAULT_REG_INTERVAL UART_REG_ADDR_INTERVAL
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#elif defined(UART_NS16550_ACCESS_IOPORT)
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#define DEFAULT_REG_INTERVAL 1
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#else
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#define DEFAULT_REG_INTERVAL 4
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#endif
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#if UART_NS16550_REG_INTERVAL_ENABLED
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static inline uint8_t reg_interval(const struct device *dev)
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{
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if (DEV_CFG(dev)->reg_interval) {
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return DEV_CFG(dev)->reg_interval;
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}
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return DEFAULT_REG_INTERVAL;
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}
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#else
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#define reg_interval(dev) DEFAULT_REG_INTERVAL
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#endif
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static const struct uart_driver_api uart_ns16550_driver_api;
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static inline uintptr_t get_port(const struct device *dev)
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@ -29,6 +29,10 @@ static const struct uart_ns16550_device_config uart_ns16550_dev_cfg_@NUM@ = {
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.pcp = DT_INST_PROP(@NUM@, pcp),
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#endif
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#if DT_INST_NODE_HAS_PROP(@NUM@, reg_shift)
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.reg_interval = (1 << DT_INST_PROP(@NUM@, reg_shift))
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#endif
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#if DT_INST_ON_BUS(@NUM@, pcie)
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.pcie = true,
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.pcie_bdf = DT_INST_REG_ADDR(@NUM@),
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