Either get priority from devicetree (liteeth) or remove Kconfig symbols
that aren't used anywhere for IRQ priority (gecko, stm32_hal).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Looking at the data sheet for the npcx section 4.15.5 CR_UART Core
Registers, the UICTRL register that is used in the npcx poll
functions is invalid when running in FIFO mode. Instead, calls to
uart_npcx_poll_in and uart_npcx_poll_out should be redirected to
their respective FIFO read/fill functions (when using interrupts).
Changes:
- When calling uart_poll_in: forward the request to uart_fifo_read.
- When calling uart_poll_out: loop until uart_fifo_fill returns
non-0 (we wrote 1 byte).
Signed-off-by: Yuval Peress <peress@chromium.org>
Simple reorg of the function declarations. This change moves
the interrupt driven functions declared at the bottom of the
uart_npcx.c file to the top, clustered under the same ifdef.
Signed-off-by: Yuval Peress <peress@chromium.org>
All dma drivers are devicetree based now so we can remove the last
bits of Kconfig associated with the old driver style.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We can utilize the devicetree macros to determine which instances to
enable. This will allow us to phase out the per instance Kconfig
symbols.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Nothing sets the op mode to anything but master. For now default the
mode to master-only and we can determine a devicetree property in the
future if we need to support other configurations.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace Kconfig symbols SPI_DW_PORT_n_INTERRUPT_SINGLE_LINE with just
seeing how many IRQs are defined in the devicetree to determine single
or multiline interrupt support.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The SoC that utilized the clock support isn't supported in Zephyr
anymore and there are no users of this code. Remove it for now as it
should get converted to utilize devicetree if needed in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace device_get_binding with DEVICE_DT_GET for getting access
to the io-channels/adc controller device.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace device_get_binding with DEVICE_DT_GET for getting access
to the io-channels/adc controller device.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace device_get_binding with DEVICE_DT_GET for getting access
to the io-channels/adc controller device.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If next_timeout() returns INT_MAX and pass it to
z_clock_set_timeout(), and machine goes to freeze or slow down.
Bad scenario as follows:
- If an argument int32_t ticks is set large value 0xffffffff,
ticks = MAX(MIN(ticks - 1, (int32_t)MAX_TICKS), 0);
replaces it into MAX_TICKS.
- uint32_t cyc will be set near by 0xffffffff
(this is 0xfffd7280 in 100 ticks per second).
- Add adjustment to cyc, adjustment max value is MAX_CYC.
(cyc = 0xffff14fd)
- Over 0x80000000 value of uint32_t is considered as negative
value of int32_t.
if ((int32_t)(cyc + last_count - now) < MIN_DELAY)
This condition is always true.
- Because cyc += CYC_PER_TICK will get overflow, driver sets mtimecmp
near value of current mtime.
(cyc = 0x00007fc0)
- Next timer interrupt will happen soon after return from interrupt
handler.
- By repeating these events, machine cannot go to next instruction,
and it's going to freeze or slow down.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Conver the NIOS-II mSGDMA driver to be devicetree based. Add node for
dma controller into nios2f.dtsi.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When running the tests of the async api of uart
on nucleo-l4r5zi we get MPU fault.
The reason is ordering initialization. The uart and dma
drivers are initialized PRE_KERNEL_1 while dmamux is
initialized POST_KERNEL.
Thus, the function device_get_binding fails since the
dmamux device is not ready to be used.
Fixes: #32715.
Signed-off-by: Shlomi Vaknin <shlomi.39sd@gmail.com>
Convert driver and users of pinmux on mcux lpc platforms to getting
basic port info from devicetree (register address, label)
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Deprecate the scl-pin and sda-pin properties in the devicetree.
Provide new scl-gpios and sda-gpios properties instead.
This lets the user specify SCL and SDA like this:
&i2c0 {
scl-gpios = <&gpio0 1 0>;
sda-gpios = <&gpio1 4 0>;
};
Instead of having to use:
&i2c0 {
scl-pin = <1>;
sda-pin = <36>;
};
Provide error checking and understandable error messages for invalid
configurations.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The current code is assuming that the SMC/HVC helpers can only be used
by the PSCI driver. This is wrong because a mechanism to call into the
secure monitor should be made available regardless of using PSCI or not.
For example several SoCs relies on SMC calls to read/write e-fuses,
retrieve the chip ID, control power domains, etc...
This patch introduces a new CONFIG_HAS_ARM_SMCCC symbol to enable the
SMC/HVC helpers support and export that to drivers that require it.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Convert ism330dhcx INT_PIN attribute from Kconfigs to Device
Tree binding properties. Here int-pin has been defined as
enum with two possible values: 1 and 2.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Convert ism330dhcx accel and gyro odr attributes from Kconfigs to Device
Tree binding properties.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Converts ism330dhcx accel and gyro range attributes from Kconfigs to
Device Tree binding properties.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
SX1272 chip is very similar to the already supported SX1276;
unfortunately, Semtech provides a completely separate driver
for this one. This commit marks an attempt to avoid code
duplication by means of some not-very-pretty ifdefery.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
The default shell configuration has heavy flash and memory requirements,
requiring project maintainers to set many configuration options to "n"
to keep flash and memory requirements within reason.
This adds a new configuration option, CONFIG_SHELL_MINIMAL, which will
disable flash and memory heavy options by default, and allow project
maintainers to select/imply only the options they want.
On a quick test from an ARM board I'm working on, enabling this option
cut flash space requirements by ~8 KB, and memory requirements by ~1 KB.
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
There is no longer a mem_block pointer in the stream struct so the
assert NULL check isn't relevant anymore.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move dmamux_stm32_channels struct from device data to device
configuration and initialize the dmamux channel - dma channel
assignment during build time,
as this association is hardwired in all known series.
The information is taken from dma_offset and dma_requests device tree
properties. The current implementation is valid for series with either
a single or two dma peripherals and a single dmamux peripheral.
Both dmas can independently enabled.
As the driver uses multi-instance DT_INST_DEFINE, also macros for a
second dmamux are are added that should allow easier extension to a
second dmamux instance.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Use timeout mechanism instead of unbounded loop during enabling ITIM32
module which source clock is LFCLK (32KHz).
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
mpu9250 is a single package that contains both an mpu6050 6-axis
motion sensor and an ak8963 magnetometer. The two parts have
separate i2c addresses, yet despite the common mpu6050 component,
it has a different value in the "WHOAMI" register -- 0x71 instead
of 0x68.
This adds the additional chip id value in order to enable the use
of mpu9250.
Signed-off-by: Adam Serbinski <adam@serbinski.com>
Qemu when running more than one processor has a known synchronization
bug where counter values read from the HPET (notionally a single
global device) can be seen going "backwards" when read from different
CPUs.
There was a pre-existing workaround in the ISR that knew about this,
but the problem can crop up anywhere the counter value is used. In
particular I caught it aliasing with the "max_ticks" computation in
z_clock_set_timeout(), where it would cause a rollover and the
resulting negative comparator value would result in no end of
hilarity.
Wrap all access to the counter register with a counter() inline that
(when the workaround is enabled) forces the result to be monotonic by
clamping it to a minimum of one more than the previously read value.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This also makes it into arch_printk_char_out() which gets linked
in place of the weak symbol version, meaning printk() is usable
as soon as the stack is set up.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The driver was reworked recently so that driver capabilites are
obtained at runtime. The function to obtain the capabilities was
called after L2 initialization though, which is invalid as L2
initialization code already depends on certain driver capabilites.
Move the capability initializer to an earliest possible stage
(i. e. just after the core driver is initialized) to fix the issue.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
The comments at the beginning of the file are not quite correct
and instructions regarding configuration are not necessary at all.
Also remove the redundant first line.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Move the SPI and I2C bus I/O bits into their own files. This makes
this driver more similar to other sensor drivers.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Now that we have various convenience macros in drivers/spi.h and
device.h defined, we can resolve some longstanding TODO items in how
this driver gets a hold of the devices it depends on:
- get bus devices with DEVICE_DT_GET
- get SPI chip select information with SPI_CONFIG_DT_INST
The results are shorter on boilerplate, save RAM, and improve boot
time.
The same techniques could be reused by other device drivers.
These changes require that the SPI bus and GPIO (for device CS)
devices used to interface with the BME280 are defined in devicetree.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
We will need this to be able to DEVICE_DT_GET() bus devices from
tests/drivers/build_all in an upcoming commit.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
We will need this to be able to DEVICE_DT_GET() bus devices from
tests/drivers/build_all in an upcoming commit.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
