aarch64: smccc: Decouple PSCI from SMCCC
The current code is assuming that the SMC/HVC helpers can only be used by the PSCI driver. This is wrong because a mechanism to call into the secure monitor should be made available regardless of using PSCI or not. For example several SoCs relies on SMC calls to read/write e-fuses, retrieve the chip ID, control power domains, etc... This patch introduces a new CONFIG_HAS_ARM_SMCCC symbol to enable the SMC/HVC helpers support and export that to drivers that require it. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
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4 changed files with 9 additions and 1 deletions
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@ -38,6 +38,12 @@ config ARM_CUSTOM_INTERRUPT_CONTROLLER
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family cores. The Cortex-M family cores are always equipped with
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the ARM Nested Vectored Interrupt Controller (NVIC).
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config HAS_ARM_SMCCC
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bool
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help
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Include support for the Secure Monitor Call (SMC) and Hypervisor
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Call (HVC) instructions on Armv7 and above architectures.
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if !ARM64
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rsource "core/aarch32/Kconfig"
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endif
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@ -22,7 +22,7 @@ zephyr_library_sources(
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zephyr_library_sources_ifdef(CONFIG_GEN_SW_ISR_TABLE isr_wrapper.S)
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zephyr_library_sources_ifdef(CONFIG_IRQ_OFFLOAD irq_offload.c)
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zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE ../common/tls.c)
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zephyr_library_sources_ifdef(CONFIG_ARM_PSCI smccc-call.S)
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zephyr_library_sources_ifdef(CONFIG_HAS_ARM_SMCCC smccc-call.S)
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zephyr_library_sources_ifdef(CONFIG_AARCH64_IMAGE_HEADER header.S)
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add_subdirectory_ifdef(CONFIG_ARM_MMU mmu)
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@ -9,6 +9,7 @@ config CPU_CORTEX_A
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select HAS_FLASH_LOAD_OFFSET
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select USE_SWITCH
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select USE_SWITCH_SUPPORTED
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select HAS_ARM_SMCCC
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help
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This option signifies the use of a CPU of the Cortex-A family.
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@ -6,6 +6,7 @@
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config ARM_PSCI
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bool "Support for the ARM Power State Coordination Interface (PSCI)"
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depends on ARMV8_A
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depends on HAS_ARM_SMCCC
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help
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Say Y here if you want Zephyr to communicate with system firmware
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implementing the PSCI specification for CPU-centric power
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