Converts the spi_nor flash driver to use `spi_dt_spec` as a
demonstration of the simplifications that the API enables.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Replace device_get_binding() with DEVICE_DT_GET to obtain the PS/2
controller and clock control device objects. It helps to improve the
efficiency for driver initialization as DEVICE_DT_GET is processed
at the link time rather than run time.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The PS/2 module in npcx provides a hardware accelerator mechanism
including an 8-bit shift register, a state machine, and control logic
that handle both the incoming and outgoing data. The hardware
accelerator mechanism is shared by 4 PS/2 channels. To support it,
this CL separates the PS/2 driver into channel and controller drivers.
The controller driver is in charge of the PS/2 transaction. The channel
driver is in charge of the connection between the Zehpyr PS/2 API
interface and controller driver.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Promote the "edac mem" shell subcommand to a generic "devmem" root shell
command. This command is useful for poking around registers and memory
outside of the EDAC drivers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Using helper functions decreases function complexity numbers reported
by static code analyzers.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Check errors returned by edac_ecc_error_log_clear() and
edac_parity_error_log_clear().
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Refactor EDAC API making it more clear, removing unneeded typedefs and
using check for optional and assert for mandatory APIs.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
In drivers/sensor/CMakeLists.txt, we have various lines like this:
add_subdirectory_ifdef(CONFIG_FOO foo)
Then drivers/sensor/foo/CMakeLists.txt says:
zephyr_library()
zephyr_library_sources_ifdef(CONFIG_FOO foo.c)
This is redundant; the foo/CMakeLists.txt won't be added to the build
system unless CONFIG_FOO=y in the first place, so there's no need for
extra boilerplate testing it again.
Remove all these unnecessary instances in each sensor driver's
CMakeLists.txt using this pattern:
zephyr_library()
zephyr_library_sources(foo.c)
In a couple of places, the '.c' extension is missing. Add them in for
consistency when that happens.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
RXTO event is generated always after ENDRX and driver relies
on assumption that ENDRX event is handled before RXTO. However,
when interrupt is preempted after ENDRX check returned false
and RXTO event is already set handling order would be swapped.
Added addtional check to handle RXTO event only if ENDRX is not
set. If ENDRX is set, it means that it is not yet handled. RXTO
event is not cleared and interrupt will be triggered again and
ENDRX event will be handled first.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The lis2dw12 sensor can generate the TAP interrupt only on INT1,
while DRDY can be generated on both. The int-pin DT property
specifiy on which pin the DRDY (and not the TAP) can be generated.
This commit fix the way the trigger is set: first the driver checks
the trigger type (DRDY or TAP), then it uses the int-pin information
only in DRDY case but allows setting TAP regardless of int-pin (it
always routes it on INT1).
The previous code was first checking int-pin: if it was INT2 then
the driver refused setting TAP triggers.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit aligns lis2dw12 sensor driver to latest multi
instance sensor driver model.
In particular it makes use of the stmemsc common routines
and move ctx handler inside struct config, so that the
bus_init routines can be totally avoided.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Remove all odr values from Kconfig and always init it
at 12.5Hz. It is responsibility of application to set
the rate to a different value using SENSOR_ATTR_SAMPLING_FREQUENCY.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Move lis2dw12 trigger pulse configurations from Kconfigs to Device Tree.
Moreover the dts properties have been renamed as 'tap', which sounds a
better name to immediately catch the feature behind it. Since tap
threshold cannot be zero, this value (which is the default in dts
binding) is used to enable/disable the device feature per each axis.
The event can be generated on INT1 only.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use gpio_dt_spec structure (and related APIs) in config for configuring
the gpio used for drdy and pulse interrupts.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Take the int-pin information (i.e. what pin between INT1
and INT2 the drdy is attached to) directly from DT.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Default the option MEMC_STM32 to "y" when the device node is defined and
enabled, so that the driver is selected automatically when the board
supports it and MEMC is enabled.
Remove the default conditional on serise as it's redundant with the one
in soc/arm/st_stm32/common/Kconfig.defconfig.series.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Add support for RT1170. The fuse register that holds
the unique device ID is different as compared to the
RT10XX series
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
UART CR_SIN interrupt enable/disable are invoked when CONFIG_PM enable.
This removes the guard for UART CR_SIN interrupt enable/disable to fix
the build issue.
Fixed#36520
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
bits property indicates the number of in-use slots of available slots
for GPIOS. We have a similar property ngpios in gpio-controller.yaml,
we will use ngpios to calculate port_pin_mask. Let's remove bits and
only use ngpios.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Similar to #32218 and #34032
Flush ART cache before erase operation
(preparing ART activation)
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Similar to #32218 and #34032
Flush ART caches before erase operation
(preparing ART activation)
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
