Implement support for half duplex communication in the bit bang SPI
driver. The SPI driver will use the MOSI pin is for both TX and RX
operations when using half duplex mode.
In half-duplex mode, the driver configures the MOSI pin as an input
pin for input only transactions. Transactions that are bidirectional
are forbidden. After an SPI transaction, the MOSI pin is left as an
input if it was an RX transaction or an output after a TX
transaction. Like before, the MOSI pin is initialized as an
(inactive) output pin when the bus is initialized.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Add API function for getting the supported capabilities of a CAN
controller. This allows for writing portable CAN applications.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Switch from using a driver-specific, compile-time devicetree one-shot
property to supporting the newly added CAN_MODE_ONE_SHOT flag for
enabling/disabling one-shot mode at run-time.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the support for enabling passthrough mode support for MPU9150
on the AK8975. We don't have a proper MPU9150 driver and the MPU9150
has been EOL. So its highly unlikely this code is being used.
Additonally we remove the device tree binding for the MPU9150 since
we don't have a proper driver for it.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add gpio_pin_get_config function to gpio_driver_api.
This function is used to read current configuration of pin.
The gpio_pin_get_config checks if driver implements this function and
returns -ENOSYS if it isn't implemented.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Custom accessors like HAL_INSTANCE() have been gradually removed
in-tree. Instead, store a pointer with the right type (struct pwm_reg
*).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Register was wrongly casted to (void *) in one case, and unnecessarily
casted in another case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The base variable type stored in config already has the right type. Such
kind of accessors have been removed in many other places.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In some case the structure enclosing the adc context
can be quite big, making static initialization quite
resource consuming
Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
Enabling the FlexSPI HyperRAM results in a build error, due to a logging
module re-definition. Fixed by changing the log module name.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
increase available RX buffers to MCUX ethernet driver.
improves measured performance on RT1050 EVK zperf download
from 500Kbps to 22Mbps.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This patch extends the adxl362 driver by adding an option
to change the inactivity detection timeout at runtime.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Building lwm2m_client with CONFIG_NET_L2_OPENTHREAD=y leads to
following warning during build:
west build -s samples/net/lwm2m_client -b nrf52840dk_nrf52840 -- \
-DCONFIG_NET_L2_OPENTHREAD=y
zephyr/drivers/sensor/nrf5/temp_nrf5.c:115:10:
warning: zero-length gnu_printf format string [-Wformat-zero-length]
115 | LOG_DBG("");
Signed-off-by: Kiril Petrov <retfie@gmail.com>
CONFIG_SIFIVE_SPI_0_ROM (default y) was an option to disable spi0 if
used to access SPI Flash ROM. However, its design had a problem: it
relied on instance numbers. You had to set status okay for spi0 to make
it work (incongruent with the purpose of the option itself). This patch
makes things simpler: if such SPI0 is not available, simply keep it
disabled in DT. Bindings have been updated to mention this case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use logical values of 0/1 for gpio_pin_set_dt and handle any
inversions as GPIO flags that might be required at a board level.
Signed-off-by: Kumar Gala <galak@kernel.org>
Introduce a new RISCV_HAS_CLIC symbol for platforms using CLIC,
reorganize the Kconfigs and make the Nuclei ECLIC depending on the new
symbol.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
When using the settings subsystem, the data argument argument passed to
flash_stm32_write_range() might not be 8-bytes aligned, causing an
unaligned memory access fault.
Fix that the same way as it was done for the STM32L4 in commit
652efa530f.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Now that we have 8 bits reserved for vendor specific GPIO flags,
introduce a new set of flags for nRF platforms to configure pins drive
mode. These new flags are equivalent to the previous existing ones, but
use a naming scheme the fits better with vendor hardware capabilities.
The table below shows the equivalence between old and new flag
| Old flags | New flags |
|---------------------------|-----------------------|
| `NRF_GPIO_DS_DFLT_LOW` | `NRF_GPIO_DRIVE_S0` |
| `NRF_GPIO_DS_DFLT_HIGH` | `NRF_GPIO_DRIVE_S1` |
| `NRF_GPIO_DS_ALT_LOW` | `NRF_GPIO_DRIVE_H0` |
| `NRF_GPIO_DS_ALT_HIGH` | `NRF_GPIO_DRIVE_H1` |
| `NRF_GPIO_DS_DFLT` | `NRF_GPIO_DRIVE_S0S1` |
| `NRF_GPIO_DS_ALT` | `NRF_GPIO_DRIVE_H0H1` |
| `NRF_GPIO_DS_DFLT_LOW \|` | `NRF_GPIO_DRIVE_S0H1` |
| `NRF_GPIO_DS_ALT_HIGH` | |
| `NRF_GPIO_DS_ALT_LOW \|` | `NRF_GPIO_DRIVE_H0S1` |
| `NRF_GPIO_DS_DFLT_HIGH` | |
Documentation has been written to explain in more detail the meaning of
the flags and how they can be used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The naming of the custom DS flags is not clear for nRF platforms. This
patch removes all the NRF_GPIO_DS* flags. New flags will be
re-introduced in a follow-up commit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit avoid re-enabling the ADC,
because this starts conversion.
According to the RefMan (RM0008) of the stm32F10x mcu,
enabling the ADC will start the conversion
if the ADC is already enabled. "Conversion starts when
this bit holds a value of 1 and a 1 is written to it."
That's not what we want.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
cAVS and ACE gpdma driver have several similarities. This commit merge
this two drivers into a single one for Intel ADSP devices.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
When using the APIC imer in TSC deadline mode, also enable reading the
full 64-bit cycle counter value (via the k_cycle_get_64() call).
Signed-off-by: Bruno Achauer <bruno.achauer@intel.com>
When PINCTRL is enabled, the SCL and SDA pin numbers are not available
in configuration structures used for nrfx drivers initialization.
In this case, these pin numbers need to be obtained from peripheral
registers.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Uses the dt_compat_enabled Kconfig preprocessor to set defaults
for each HDA driver.
Each direction is uniquely selectable which can be useful when building
with SOF where only some directions may wish to be enabled at any given
time.
By default, given the device tree (intel_cavs.dtsi) only the host
directions are enabled but an overlay may adjust that as needed.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Not all platforms support setting the LSE driving capability, causing
the build to fail for platform such as the STM32L072 if compiled with
CONFIG_STM32_LPTIM_CLOCK_LSE=y.
Adding an #ifdef guard around the call to skip it if not defined in the
HAL.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
In npcx series, not all GPIO pads support Multi-Input Wake-Up Unit
(MIWU) functionality. Hence, this CL adds checking whether GPIO's pad
configuration is valid first before using it.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
