When sleep modes are used, configure sockets
to restore on boot. Letting the HL7800 manage
this means the driver does not have to do it.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
This commit sets the power down bit of the module SDP, UART3, UART4,
and I3C by default. The module's driver should take the responsibility
to clear it to turn on the power. It helps reduce the power consumption
when an application doesn't use these modules.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
If CONFIG_ETH_NATIVE_POSIX_RANDOM_MAC=n and
CONFIG_ETH_NATIVE_POSIX_MAC_ADDR="", the MAC address can be set with a
net_mgmt call before the driver is initialized.
Signed-off-by: Björn Stenberg <bjorn@haxx.se>
The ADC sampling of it8xxx2 needs to read each channel in sequence,
so it needs to wait for an interrupt to read data in the loop
through k_sem_take().
In test_adc.c, k_timer_start() is used in the interval test, so we
need to use polling wait instead of k_sem_take() to wait, otherwise
it will cause kernel panic.
k_is_in_isr() can determine whether to use polling or k_sem_take()
at present.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Makes the IRQ_CONNECT macro statically declarable for Xtensa (nothing
prevented it except its structuring). Allows for IRQ_CONNECT usage
on a xtensa only platform to be declared statically avoiding the
fluff of setting up and enabling irqs for cavs gpdma.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Intel's adsp needs to set, at a minimum, a clocking bit before the driver
can initialize the designware dma controller. In many ways it is the
designware dmac IP but with additional registers and functionality added
on top of it. So the code structure here follows how the hardware
appears to be designed, layered on top of the designware driver.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Move most of the designware driver into a common compile unit with a
a header that exposes the common functionality.
This allows for derivative hardware, such as that in intel's adsp (cavs)
to use the common functionality while extending.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
STM32L5 has option to disable dual bank support.
When this is disabled, the flash page size is changed
from 2k pages to 4k pages. This PR adds support for this
diversity.
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Add power management constraints to the entropy driver.
This prevents the hardware block to lose it's clock when
going into any stop mode of the cpu, which would cause the
clock error flag to be set while filling the pool.
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Add Kconfig switch to disable automatic eSPI slave boot
acknowledgement.
This allows to perform lenghty operations before continue any eSPI
handshake with eSPI master.
Required for eSPI SAF boot configuration.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Currently pwm_npcx_pin_set() disables and reconfigures the PWM
controller every time its called, causing the PWM line to pulse even if
only the duty cycle is changed.
Modify the function so that controller is only disabled if any of the
configuration has to be changed, only set the new DCR otherwise.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Due to serialization restrictions radio api calls cannot be nested, any
violation of this rule leads to a deadlock. This commit fixes the bug
by transferring the nested radio api call to ot_radio_workq.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Follows #41918.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Follows #41918.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Follows #41918.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Follows #41918.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
This patch adds GPIO and 96board LS (Low Speed)iexpansion connector
support for SiFive HiFive Unleashed and also enables GPIO basic test.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Add pwm-0 to support tests/drivers/pwm/pwm_api.
Solve tests code runtime error on it8xxx2_evb:
1.If the pwm channel target frequency is < 1, then we will
return an error code.
2.If the target_freq is <= 324Hz, we will configure that this pwm
channel need to output in EC power saving mode.
In test_pwm_cycle() case, the period is 64000, then the
target_freq is 8000000 / 64000 = 125Hz and <= 324Hz, so we will
switch the prescaler clock source from 8MHz to 32.768kHz.
Then the target_freq is 32768 / 64000 = 0.512Hz and < 1Hz,
this will return an error code. In order to get the same
target_freq, we always return PWM_FREQ in
pwm_it8xxx2_get_cycles_per_sec().
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
The driver enabled extended error code (AT+CMEE=1) during
setup but is missing a handler for the +CME ERROR, fix that.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Waits until the network interface goes down before switching the
GSM_MUX. It uses the NET_MGMT_EVENT to signal a semaphore to
contiue when closed. This allows for the LCP state machine to
properly terminate. When skipping this wait, the second time
connecting, the connection might fail.
Tested on a real modem.
Fixes GSM PPP behavior in combination with: #41802
Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
There is a part of the AT2X driver that handles controlling WP pin
connected to the EEPROM chips, but in some systems, the WP line can be
controlled by another component.
Check if any AT2X node defines wp-gpios, if not - do not compile the
code related to WP to save space.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Reduce the number of TX buffers in use on the MCP2515 from 3 to 1 in
order to avoid CAN frame priority inversion.
The MCP2515 is unable to do internal TX frame arbitration based on the
CAN-ID of the frame. Priority must be set per TX buffer and the priority
cannot be rewritten unless the frame transmission is aborted.
Fixes: #26541
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Switch the Bosch M_CAN driver from TX FIFO mode to TX Queue mode in
order to avoid priority inversion of CAN frames.
Fixes: #26541
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Similar to commit be32e33774, this
replaces the use of DEV_NAME macros with dev->name directly. This also
fixes#42996 for i2c_sam_twi.c in particular.
Signed-off-by: Ryan Armstrong <git@zerker.ca>
Change the way this shim driver configures the I2C frequency, so that
it is possible to use also 1 MHz on nRF5340 (the nrfx driver performs
extra initialization steps for this frequency, hence it needs to be
reinitialized when the shim is reconfigured).
Correct the shim to handle selection of 1 MHz (or FAST_PLUS) bitrate
both through dts and I2C API.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
There are some pins that do not support internal pullup/pulldown.
This PR make sure to check that and return error if needed.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
ESP32 has 2 GPIOs: gpio0 and gpio1.
Zephyr DTS model requires pin definition in dts file
from 0 to 31, meaning that when some pin within gpio1 range
is required, gpio driver needs to increament this value
by 32, required by LL API.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Limit gptp range_adjust range for improved performance.
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Xabier Marquiegui <xmarquiegui@ainguraiiot.com>
