clock_stm32_ll_common.h was missing <stdint.h> and <zephyr/device.h>. It
turns out things worked because <zephyr/init.h> has a forward
declaration of struct device.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Selects the hidden Kconfig to note that the APIC timer's cycle count
accessor is a lock free path and may use the spin lock time limit check.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Select the Kconfig option noting that the cavs (intel adsp)
timer driver provides a lock free cycle count accessor and
therefore can be used with a spin lock time limit assert.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Spin locks held for any lengthy duration prevent interrupts and
in a real time system where interrupts drive tasks this can be
problematic. Add an option to assert if a spin lock is held for
a duration longer than the configurable number of microseconds.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The TXF interrupt mask is not properly set. In this case the
interrupt line is not cleaned, leading to the re-entrance
in the interrupt handler.
the issue is linked to the management of the IPCC_CxTOCySR value.
The TXF interrupt is triggered when the IPCC_CyMR is channel bit is
set to 0 and the IPCC_CxTOCySR associated bit move from 1 to 0.
The fix is to check if the IPCC_CxTOCySR channel bit is 0 instead of 1.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
For Intel ACE1.x the GPDMA link list structure should be aligned
to 64 bytes to avoid the link list entry fetch crossing the 64 bytes
address alignment.
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Add support for regulator-boot-on to PMIC driver. Many PMIC devices will
be enabled at boot, so this property allows the regulator framework
to correctly track their state.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add mode specific PMIC configuration functions, to allow consumers to
configure target voltages of each regulator mode. This will allow users
to enable or disable, as well as set target voltages for regulator modes
without actually entering that mode.
This feature can be useful for power managment applications where the
consumer may want to switch the regulator to low power mode at a later
time.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Remove mode awareness from PMIC voltage setting, current setting, and
enable/disable functions. Concepts such as regulator consumers do not
work well with multiple modes, so support for changing voltages or
disabling regulators in each mode has been removed.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The inactivity time registers identified by `ADXL362_REG_TIME_INACT_L`
and `ADXL362_REG_TIME_INACT_H` accepts a 16-bit value. (8 in each).
Without this change the last 5 bits of the register value
will be cleared.
Clearing the last bits of the register value greatly reduces the maximum
inactivity time that can be set.
Signed-off-by: Simen S. Røstad <simen.rostad@nordicsemi.no>
Linux kernels before v5.14 do not define the CANFD_FDF flag. The flag is
disregarded within the Linux kernel. It is just there for being able to
reuse the canfd_frame struct for classic CAN frames in Linux user-space
applications.
Define the CANFD_FDF flag locally if not already defined to allow compiling
against older Linux kernel headers.
See the following Linux kernel commit for further details:
02546884221279da2725e87e35348290470363d7
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This change implements part two of the program laid out in the TSCH RFC,
see #50336#issuecomment-1250250154 :
> Consolidate IEEE 802.15.4 options in net_pkt
This change improves decoupling of generic net core code from
IEEE 802.15.4 internals. It also simplifies IEEE 802.15.4
attribute cloning and thereby makes it easier to maintain and less
error prone (and probably even faster as individual bits are no longer
copied over separately).
This enables us to extend and design IEEE 802.15.4 L2 attributes inside
the package in isolation from the net core code which will no longer
have to be changed when introducing changes or additions to the flags.
This flexibility will be built upon in later change sets to model the
IEEE 802.15.4 attributes closer to the spec.
The solution is inspired by Linux's sk_buff->cb attribute which addresses
the same concern as the attribute introduced in this change set:
https://elixir.bootlin.com/linux/v6.0.1/source/include/linux/skbuff.h#L871
As the inline comment says: The cb attribute can be made a union or even a
uint8[something] in the future, if further L2s need a control block, too.
Right now such full indirection would make the code overly abstract, so
I chose to compromise with maintainability in mind.
Care has been taken to ensure that this changes does not introduce
additional padding into the net package. To maintain zero-padding, future
changes to the net packet struct will have to ensure that the
IEEE 802.15.4 struct is 4-byte aligned (iff the IEEE 802.15.4 struct
continues with max uint32_t scalar members) which is no deviation from
the previous implementation.
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Nordic's IEEE 802.15.4 radio driver adapter layer had a few raw accesses
to net packet attributes.
Packet attributes should never be accessed directly, though, but only
through the dedicated accessor methods provided by the net core.
This change replaces raw accesses to packet attributes by their
respective wrapper functions.
This also is a necessary precondition to the isolation and
encapsulation of IEEE 802.15.4 specific packet attributes which will be
introduced in a later commit of this change set.
Fixes: #51264
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Several IEEE 802154 drivers allocated RX packets from the TX pool.
This may seem like a minor problem at first sight but it may become
problematic if the pool is used to distinguish package types as is the
case in some code paths, e.g. for packet priority or determination of
the packet buffer pool.
This bug also has the potential of starving the TX pool capacity which
even may make devices vulnerable to DoS attacks as sending may be
prohibited by addressing enough RX packets to a device to let it run out
of TX capacity.
Fixes: #51261
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Adding multidomain support by introducing log_link module which
acts as a receiver of log messages created by another domain.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
On stm32g0, stm32g4, stm32l4, stm32l5, stm32u5,
and stm32wbx, it is allowed to write a zeroed dword
on unerased flash.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Add MEC172x full duplex qmspi driver version to support full
duplex transfers as expected by the Zephyr spi driver model.
On every spi clock we transmit one bit and receive one bit.
This driver will work with Zephyr SPI NOR driver.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The include <zephyr/kernel.h> is missing from eeprom driver,
causing build error. This is fixing it like PR # 51246 or #51220.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The phys property was not considered during initialization of the
driver config, so that the transceiver was not enabled properly
in case it has an enable/standby pin.
Signed-off-by: Martin Jäger <martin@libre.solar>
Newer ESP32 series MCUs like the ESP32-C3 contain some register changes
incompatible to the original ESP32 and the SJA1000.
The additions in this commit consider these changes and fix the
incompatibilities in the TWAI front-end for the SJA1000 driver.
Signed-off-by: Martin Jäger <martin@libre.solar>
This is a preparation to use the custom implementation in ESP32 TWAI
frontend for newer ESP32 series chips like the ESP32-C3, which have
timing registers incompatible with the SJA1000.
Signed-off-by: Martin Jäger <martin@libre.solar>
Implement GPIO driver minimal API's for NXP S32 devices, based on SIUL2
peripheral. SIUL2 allows to control the pins electrical characteristics
such as internal pull resistors, pin direction and more.
GPIO driver API's for interrupts will be implemented in a future patch.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
This patch introduces support for NXP S32 LINFlexD peripheral operating
in UART mode. Polling and interrupt-based serial API's are supported.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce Pinctrl driver for SIUL2 module present on NXP S32 devices,
which provides control over all pins, such as function selection and
electrical characteristics that appear on external chip pins.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
PMIC regulator disable function was unconditionally disabling the PMIC
regulator when the disable API was called, which does not match the
expected behavior when using the onoff service. Fix this error.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
If the read function returns value of zero, there is no more data
in the file and the function should return value of -1.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
We have been encountering timeout issues when erasing large flash
sections (before receiving an image via mcuboot) from this semaphore
take:
5af0fbc2e3/drivers/flash/soc_flash_nrf_ticker.c (L225-L233)
I think this is because this constant is based on the time taken to erase
the chip but doesn't take account of the fact it is being done by a
ticker. If I understand correctly the ticker is a timeshare mechanism
so the actual max erase time is some factor based on how much time is
given to the task by the ticker.
This multiplies the max timeout by 1.5
Signed-off-by: Kyle Cooke <cookekyle97@gmail.com>
Add limits.h and irq.h to fix build errors for boards/tests that include
the zephyr,nativer-_posix-counter driver.
Signed-off-by: Keith Short <keithshort@google.com>
Fix the scope of some variables in various STM32 drivers including:
- SDMMC
- DMA
- OSPI/QSPI Flash
- Interrupt controller
The variables are set static instead of global and const if appropriate.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The IEEE 802.15.4 radio driver encodes attributes in:
* little endian for everything that is close to the protocol as
IEEE 802.15.4 frames are little endian encoded.
* mixed big and little endian in its configuration where extended
addresses are being represented. These inconsistencies are unfortunate
but cannot be easily fixed in a backwards compatible way so will be
left untouched in this change.
Endianness was almost nowhere documented which explains these
inconsistencies and led to several bugs where assignments of different
byte order are not converted (or sometimes converted, sometimes not).
This change documents intended endianness within the realm of the
IEEE 802.15.4 radio driver code. Conversion bugs are fixed in a separate
commit.
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
STM32F107 has an Ethernet MAC but no PTP clock, so remove hard requirement
on PTP clock definition in preparation for STM32F107 Ethernet MAC support.
Signed-off-by: Pierre-Emmanuel Novac <piernov@piernov.org>
Add support for setting the target mode for a PMIC regulator. Some
regulators support multiple modes, each with distinctive voltage and
current configuration data. This function allows the consumer to switch
the PMIC into a new mode. The PMIC can then be configured to use a new
set of voltages.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move I2C register reads to regulator_read_register in regulator driver,
to enable better abstraction of regulator I2C reads
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Refactor binding to use root PMIC IC, so that properties can be shared
between regulator devices. Each individual regulator output is still
created as an individual device, since the regulator API aligns with
these devices better than the PMIC IC itself.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
