nRF5340 SoC has `TASK_STOP` this patch implements disabling
watchdog for that SoC.
Changed body of `wdt_nrf_setup()` to utilize `nrfx_wdt_reconfigure()`
driver API.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Fixes an unhandled interrupt runtime crash if CONFIG_SPI_XMC4XXX_DMA=y and
CONFIG_SPI_XMC4XXX_INTERRUPT=n.
The unhandled interrupt error is triggered because irq_enable() was called
without calling IRQ_CONNECT() when CONFIG_SPI_XMC4XXX_INTERRUPT=n.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
In the interrupt driven spi, spi_context_update_tx() is called once
from the calling thread and then once in spi_xmc4xxx_isr() after each
new byte is received. This actually means that there is one extra call to
spi_context_update_tx(). This is fine if spi_context_update_tx() complete
it's call in the calling thread before the interrupt fires, however, this
cannot be guaranteed especially if the calling thread is pre-emptive and
has a low priority.
Fix this by calling spi_context_update_tx() in the calling thread before
transmitting the first byte.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Get GPR base address using nodelabel as this will align for all the
current in tree platforms. Currently inst 0 of the compat gets wrong
node and base address on RT11xx.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
GPR17 calculation for configuration of RAM banks is incorrect,
bit shift should be 2 per idx, not 1, this is major bug that needs
correcting, currently all RT boards are affected with wrong
configuration.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Currently, the NXP S32 SoCs have three redundant Kconfig hidden
options to define the part number. To streamline this, we will
retain `CONFIG_SOC_PART_NUMBER` to store the part number as a
string and `CONFIG_SOC_PART_NUMBER_<part>` that can be selected
by the boards.
Furthermore, for drivers requiring conditional code compilation
based on the target SoC, they should utilize the series or SoC
config option as applicable, instead of the part number config.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The existing S32K3 Kconfig options employ the `M7` suffix, which is
redundant given that all cores in this series utilize an Arm Cortex-M7
core. Therefore, we should remove it.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
A proper netmask should be set on the loopback interface, so that
source address selection work properly when there are multiple
interfaces in the system.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Add Renesas rzt2m gpio driver with basic functionality.
It supports pin mode configuration and writing/reading to/from gpio ports.
Includes dts changes to build blinky sample.
Signed-off-by: Jakub Michalski <jmichalski@internships.antmicro.com>
This adds a new driver for Renesas RZ/T2M.
The driver allows configuration of pin direction,
pull up/down resistors, drive strength and slew rate,
and selection of function for a pin.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
This adds a UART driver for the Renesas RZ/T2M
Serial Communication Interface.
The driver implements:
* Polling API,
* Interrupt-driven API.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
Move the input_kbd_matrix.h header out of drivers/ and into include/,
this allows external drivers to use it and doxygen to pick it up.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add a input_kbd_matrix doxygen group and add this to the other Input
APIs page, add few missing argument documentation entries.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The API field of input_kbd_matrix_common_config should have been a
pointer from the start, clang-16 caught this with a compiler warning.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change the row-count and col-count to be optional in the generic
binding, add a second pair of macro to allow the implementation to
specify the numbers from a different property.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Define max SYSCLK and AHB clock frequencies as 280 MHz, max APB
frequency as 140 MHz, and enable semaphore clock.
Signed-off-by: Charles Dias <charlesdias.cd@outlook.com>
Internal flag (w1500_data.connecting) was not being set to false after
connection. Interface raises NET_EVENT_WIFI_CONNECT_RESULT event with
error status instead of NET_EVENT_WIFI_DISCONNECT_RESULT when
disconnection is manually requested (NET_REQUEST_WIFI_DISCONNECT).
Signed-off-by: Diogo Correia <diogo.correia@fraunhofer.pt>
Remove the direct use of the HAL API to configure clocks and use
Zephyr's clock control API instead.
Currently the PORT peripherals of the Kinetis family are either
clocked by PCC in the case of KE1xF devices, or by SIM for the
rest of the devices. PCC clock driver converts internally the
subsys clock name into the clock gate address. SIM clock driver
expects this conversion to be done by the caller.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Add device level power management to rm67162 display. Device level power
management for this controller calls the MIPI DSI detach API, in order
to power down the MIPI DPHY when the display is not active.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for mipi_dsi_detach API to dsi_mcux_2l driver, and
update RT5xx SOC interface to enable halting clocks for the MIPI DPHY.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add module which can handle RX path of UART asynchronous RX API. Module
can be utilized in cases where processing of received data is not performed
directly in the event context but it is delayed. At least two use cases
has been identified (shell async UART backend, asynchronous to interrupt
driven adaptation layer).
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
The LPC DMA IP offers hardware triggering via a series of SOC-specific
signals, often including sources like GPIO pins or hardware timers.
Support hardware triggers via the "dma_slot" field of the DMA
configuration structure. Currently support is offered for setting the
following:
- Trigger polarity
- Trigger level/edge mode
- burst mode
- burst length
- peripheral request
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
A configurable delay during regulator switch on is currently
only supported by the GPIO and fixed regulator drivers.
This functionality has been moved to the common driver, so it can
be easily added to any regulator driver.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.
The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the driver's ISR within the shim
driver itself.
Note that for some peripheral instances is needed to redefine the
HAL macros of the peripheral base address, since the naming is not
uniform for all instances.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The wait times in the self test procedure, according to the datasheet
are 4 / ODR (current set value).
Update the self test procedure by using the delay corresponding to the
current ODR value that is set, instead of default ODR.
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
This reverts commit d963900dbd.
Since i.MX 93 is supported by mcux_ccm_rev2, remove i.MX 93 support
from mcux_ccm driver.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
i.MX93 share similiar register layout with i.MX RT11xx. Change ccm driver
to align with i.MX RT11xx, and make it easier to enable other drivers.
Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
The LPS22DF is an ultracompact, piezoresistive, absolute pressure sensor
that functions as a digital output barometer. The LPS22DF provides lower
power consumption, achieving lower pressure noise than its predecessor.
This driver is based on stmemsc HAL i/f v2.3
https://www.st.com/en/datasheet/lps22df.pdf
Signed-off-by: Armando Visconti <armando.visconti@st.com>
It is just used to be able to DEVICE_DT_GET() bus devices from
tests/drivers/build_all in an upcoming commit.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Corrected comapare value of dma_is_enabled as it is compare with
wrong macro to check if channel is enabled or not.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Enhance LPSS DMA to support UART and I2C DMA transfer by
enabling init priority of DMA based on dependency on
parent device.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Replace unrelated part name with the actual driver name in the
adxl372.h header file.
Fixes: a3e7cea ("adxl372: Add driver for ADXL372 high-g accelerometer")
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
