Commit graph

23353 commits

Author SHA1 Message Date
Titouan Christophe
1267d51dda drivers: sensor: vl53l0x: run uncrustify
Apply uncrustify on the driver source code before going further

Signed-off-by: Titouan Christophe <moiandme@gmail.com>
2022-04-07 14:30:01 -05:00
Joakim Andersson
2dae1823ab hwinfo: Add dependency handling for HWINFO_NRF in nonsecure
The limitation on HWINFO_NRF depending on not nonsecure was removed in
52be3030aa.
This caused problems when TF-M was not enabled.

This happens on the thingy53_nrf5340_cpuapp_ns board since this board
is not supported by TF-M.

Introduce proper dependency handling for the soc secure functions
to make HWINFO_NRF unavailable when no secure services exist in
nonsecure.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2022-04-07 11:02:52 -04:00
Khor Swee Aun
0431d10b10 drivers/serial: Extend Altera Jtag Uart driver support
Extend Altera Jtag Uart driver support without Altera HAL driver
by default. uart_altera_jtag_hal.c renamed to uart_altera_jtag.c and
new config, CONFIG_UART_ALTERA_JTAG_HAL is introduced to allow driver
to use Altera HAL driver when needed.

Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
2022-04-07 06:58:16 -04:00
Jordan Yates
ad25e77698 serial: uart_nrfx_uarte: async compilation warning
Only compile in async related code when at least one UARTE instance has
enabled async mode. This fixes an "unused function" warning when
`CONFIG_UART_ASYNC_API` is enabled but no UARTE instances has async
enabled. This is possible when the async API is being used for an RTT
UART driver.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2022-04-07 11:53:29 +02:00
Henrik Brix Andersen
9f4bb75af6 drivers: can: handlers: copy outbound argument structs
Pass a copy of outbound argument structs to the implementation functions
as recommended for Zephyr system calls.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-04-07 09:38:18 +02:00
Henrik Brix Andersen
ad34c670d8 drivers: can: handlers: unify naming of local argument copies
Unify the naming scheme for local copies of user provided arguments.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-04-07 09:38:18 +02:00
Gerard Marull-Paretas
8ff797b850 drivers: pwm: litex: remove redundant config 'helper'
All these sort of helpers were removed from tree a while ago, this one
was missed as it uses a custom name.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-07 09:35:05 +02:00
Gerard Marull-Paretas
e3fde6b01a drivers: pwm: sifive: remove redundant checks
If dev was null, caller would have faulted before since dev->api needs
to be accessed before reaching this point. Also, a well-defined device
will never have a NULL dev->config.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-07 09:35:05 +02:00
Gerard Marull-Paretas
ccc12be0a5 drivers: pwm: return -ENOTSUP if inactive level is not supported
The API spec states that calling pin_set() with period set to 0 is
equivalent to set the PWM channel to an inactive level. Some drivers
treat this input as invalid (-EINVAL), however, it's an unsupported
feature. Maybe it's due to copy&paste effect? This changes error message
to be clear and changes return value to -ENOTSUP for this case.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-07 09:35:05 +02:00
Gerard Marull-Paretas
0c908706fb drivers: pwm: remove duplicated pulse > period checks
The API call checks for this condition before calling the pin_set driver
OP call, so drivers don't have to do this check now.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-04-07 09:35:05 +02:00
Daniel DeGrasse
e4becf1c7b drivers: i2s: i2s_mcux_flexcomm: add pinctrl support to lpc i2s driver
Add pinctrl support to i2s flexcomm driver for lpc.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-06 20:57:22 -07:00
Daniel DeGrasse
415b2bdac0 drivers: pwm: pwm_mcux_sctimer: Add pinctrl support for lpc pwm
add pinctrl support for lpc sctimer pwm driver

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-06 20:57:22 -07:00
Daniel DeGrasse
c637d7d672 drivers: spi: spi_mcux_flexcomm: add pinctrl support to lpc spi driver
add pinctrl support for spi_mcux_flexcomm driver.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-06 20:57:22 -07:00
Daniel DeGrasse
1d33b6b86b drivers: i2c: i2c_mcux_flexcomm: enable pinctrl for i2c flexcomm driver
enable pinctrl for i2c flexcomm driver

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-06 20:57:22 -07:00
Daniel DeGrasse
f8828a4434 drivers: gpio: gpio_mcux_lpc: Add pinmuxing control to gpio driver
Add pinmux control to gpio driver for LPC, so that pin control can work
correctly.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-06 20:57:22 -07:00
Daniel DeGrasse
58008b3085 drivers: serial: Add pinctrl support to usart flexcomm driver
Add pinctrl support to LPC USART flexcomm driver

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-06 20:57:22 -07:00
Daniel DeGrasse
c133e357ef drivers: pinctrl: Add LPC IOCON pinctrl driver
Add lpc iocon pinctrl driver. Driver handles IOCON clock initialization as
well as IOCON pin configuration

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-06 20:57:22 -07:00
Kai Vehmanen
91516a2be3 drivers: intc: intc_cavs: use correct per-core register set for all ops
Current code uses per-core register to check interrupt status and
dispatch handlers. However to disable/enable the interrupt, core
zero register is always used.

While the handlers in _sw_isr_table are common for all cores,
the status bits should still be handled separate for each core.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2022-04-06 22:00:14 -04:00
Adrian Bonislawski
cd11910201 dma/cavs_hda: Support channel filtering
Support channel filtering to find the requested channel
if filter_param provided

Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
2022-04-06 14:08:01 -04:00
Casper Meijn
c33d1b55f8 drivers: display: st7789v: Add multi-instance support
Replace the config and data struct with a macro. Execute the macro
for each instance.

Signed-off-by: Casper Meijn <casper@meijn.net>
2022-04-06 10:58:26 +02:00
Casper Meijn
ac9cd9e89a drivers: display: st7789v: Remove compile time reset selection
Replace the compiletime `#if` with a runtime decision. This makes
a multi-instance driver possible.

Signed-off-by: Casper Meijn <casper@meijn.net>
2022-04-06 10:58:26 +02:00
Casper Meijn
7f5c5cf317 drivers: display: st7789v: Move params to struct config
Move the const configuration parameters to `struct st7789v_config`.

Signed-off-by: Casper Meijn <casper@meijn.net>
2022-04-06 10:58:26 +02:00
Henrik Brix Andersen
81152d0aae drivers: can: handlers: verify timing parameter access
Verify read access to the timing and timing_data parameters in
z_vrfy_can_set_timing() and pass a copy of these structs to the
implementation as recommended for Zephyr system calls.

Remove unnecessary typecasts.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-04-05 10:33:08 -07:00
Henrik Brix Andersen
c389594e12 drivers: can: mcp2515: correct min/max timing values
The MCP2515 requires phase segment 2 to be at least 2 time quanta.

The prescaler has a 6 bit register, allowing for real-world prescaler
values between 1 and 64.

Fixes: #44484

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-04-05 10:33:08 -07:00
Henrik Brix Andersen
a1e33d8868 drivers: can: mcan: fix bounds check for data phase prescaler
Fix the bounds check for the data phase prescaler timing parameter. The
maximum allowed value is 0x20, not 20 decimal.

Fixes: #44483

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-04-05 10:33:08 -07:00
Henrik Brix Andersen
47119333e1 drivers: can: mcan: allow sjw == CAN_SJW_NO_CHANGE
Take CAN_SJW_NO_CHANGE into account when bounds checking the sjw timing
parameter values.

Fixes: #44482

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-04-05 10:33:08 -07:00
Shawn Nematbakhsh
c74526919d soc: riscv: sifive-freedom: Get coreclk and peripheral clock from DTS.
Rather than specify input clock for each peripheral individually, instead
specify the relevant clocks in DTS.

This will enable easier support for non-default coreclk on fe310 in a
follow-up CL.

Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
2022-04-05 12:00:03 +02:00
Jose Alberto Meza
33fde4b10a drivers: espi: xec: mec172x: Handle eSPI bus host enable
Add eSPI bus host enable/disable events from eSPI host.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2022-04-05 11:19:03 +02:00
Jay Vasanth
89d6695f7c drivers: i2c: MEC15xx i2c error handling
Updates to MEC15xx i2c error handling:
1. timeout_seen handling is simplified. For all errors we
continuously poll
2. error flag is not set for timeout_seen handling and hence
recover_from_error() call is not required.
3. In i2c_xec_poll_write(), ETIMEDOUT for (START + ADDRESS) byte
is treated as default error and error_seen flag is set (instead
of timeout_seen flag)

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-04-05 11:18:56 +02:00
John Kjellberg
81d1be76ea drivers/disk: sdmmc: stm32: DMA header requested on F4 serie
Even if not used DMA HAL is required in F4 SD HAL driver. Just
as for L4/F7 series that have been added before.
Add it for this specific serie.

Signed-off-by: John Kjellberg <kjellberg.john@gmail.com>
2022-04-05 11:17:08 +02:00
Ruibin Chang
f6965ac930 ITE drivers/timer: clean up sys_clock_set_timeout()
Setting event timer count at least 1 hw count, it's redundant,
so I clean up this else {} case. And add the comment about
the K_TICKS_FOREVER and INT_MAX case.

NOTE:
CONFIG_TIMEOUT_64BIT = y, then k_ticks_t type is int64_t.
K_FOREVER is (k_timeout_t) { .ticks = (K_TICKS_FOREVER) },
and K_TICKS_FOREVER is ((k_ticks_t) -1),
so K_FOREVER is a k_timeout_t type structure, and
the member ticks: type int64_t,
                  value (= K_TICKS_FOREVER) 0xFFFF FFFF FFFF FFFF.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2022-04-05 11:16:51 +02:00
Jay Vasanth
bbec77c982 drivers: peci: Microchip XEC PECI driver add PINCTRL support
Add PINCTRL support to Microchip XEC PECI driver shared by
MEC172x and MEC15xx families.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-04-05 11:16:41 +02:00
Jay Vasanth
9777c5e90e drivers: peci: Microchip XEC PECI driver add MEC172x support
Update Microchip XEC PECI driver to support MEC172x.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-04-05 11:16:41 +02:00
Jay Vasanth
822e3bb612 drivers: peci: Microchip XEC PECI driver standardize
Standarize device structure usage for mchp peci driver

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-04-05 11:16:41 +02:00
Alexander Mihajlovic
4ff4991e16 drivers: uart_stm32: Add support for tx/rx swap
Add a new boolean devicetree property `tx-rx-swap` to the
st,stm32-usart binding, used to control TX/RX swap during
device initialization.

Signed-off-by: Alexander Mihajlovic <a@abxy.se>
2022-04-04 13:44:23 -07:00
Henrik Brix Andersen
78a855b418 drivers: can: add missing can_set_mode() syscall handler
Add missing syscall verification handler for can_set_mode().

Fixes: #44361

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-04-04 09:41:35 -05:00
Joakim Andersson
52be3030aa drivers: hwinfo: Remove HWINFO_NRF limitation for non-secure config
Remove the limitiation in HWINFO_NRF not working in non-secure
configuration. Use the exposed soc_secure_read_deviceid function
that accesses the device ID through the secure services.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2022-04-04 11:15:28 +02:00
Joakim Andersson
4b80afdd27 drivers: ieee802154: Use secure services
Allows the setting of ieee802154 EUI64 address in non-secure processing
environment by reading the FICR device ID through the secure service.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2022-04-04 11:15:28 +02:00
Henrik Brix Andersen
49424574c5 drivers: can: handlers: can_get_max_bitrate() is an optional
The can_get_max_bitrate() is an optional API function. Limit validation
to the CAN device driver pointer.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-04-04 11:15:10 +02:00
Andrzej Głąbek
586e26e8fc soc: nrf: Use data from DTS to populate HAS_HW_NRF_* Kconfig options
Instead of selecting appropriate HAS_HW_NRF_* options for particular
nRF SoCs (and simulated nRF52 target), set their values basing on
information from devicetree.
Correct also semantics of those options so that they are set only when
a corresponding DT node is enabled. This allows using them directly in
Kconfig dependencies of Zephyr drivers for nRF peripherals. Update
appropriately these dependencies.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-04-02 15:14:38 +02:00
Andrzej Głąbek
cd00a3a3c9 scripts: kconfigfunctions: Redefine dt_nodelabel_has_compat()
The function in its current form is confusing because unlike other
similarly named functions (dt_nodelabel_has_prop(), dt_node_has_prop())
or devicetree macros (DT_NODE_HAS_COMPAT(), DT_NODE_HAS_PROP()), this
function takes into account the status of the checked node and returns
"y" only when the node is enabled.
This commit redefines dt_nodelabel_has_compat() so that it no longer
checks the node status, and for cases where the previous functionality
is needed, a new function named dt_nodelabel_enabled_with_compat()
is introduced as a replacement.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-04-02 15:14:38 +02:00
Sylvio Alves
e04172fcef drivers: spi: esp32c3: add master init call
ESP32C3 requires master init call to enable its clock
gate. Without this, SPI interface may not initialize
properly.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-04-01 13:00:16 -05:00
Dino Li
5b9db5a251 it8xxx2: re-factor idle routine
Don't leave idle state if soc isn't waked-up by an interrupt.
(We change to check interrupt controller register)

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2022-04-01 12:49:09 -05:00
Henrik Brix Andersen
e1290bedeb drivers: can: handlers: verify API call in z_vrfy_can_get_state()
Verify the get_state API call in z_vrfy_can_get_state(). Adjust sizeof()
arguments to match the rest of the file.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-04-01 12:47:04 -05:00
Henrik Brix Andersen
d64a02656d drivers: can: handlers: Remove unnecessary typecasts
Remove unnecessary typecasts from from z_vrfy_can_remove_rx_filter().

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-04-01 12:45:39 -05:00
Henrik Brix Andersen
422a2a8204 drivers: can: handlers: verify API call in z_vrfy_can_add_rx_filter_msgq()
Verify the add_rx_filter API call in z_vrfy_can_add_rx_filter_msgq() as
this is used by the underlying implementation. Remove unnecessary
typecasts.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-04-01 12:45:39 -05:00
Henrik Brix Andersen
c1477f9b38 drivers: can: handlers: do not verify void pointer
Do not attempt to verify that the current thread has access to the void
*user_data argument to z_vrfy_can_send(). The size of the data is not
known and no driver code will try to dereference it (it may not even be
a valid pointer).

Remove unnecessary typecasts from z_vrfy_can_send().

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-04-01 12:45:39 -05:00
Sjors Hettinga
951983191b drivers: net: loopback: Add interface to simulate packet drop
To allow for high level robustness tests on protocols, add an interface
to control the packet drop rate. A rate of 0 means no packet dropped, a
rate of 1 means all packets being dropped.

Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
2022-04-01 12:36:14 -05:00
Ruibin Chang
a5fc945fd2 ITE drivers/timer: check HW cycles per second by build assert
ITE RTOS timer HW frequency is fixed at 32768Hz, because this
clock source is always active in any EC mode (running/doze/deep doze).

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2022-04-01 12:33:11 -05:00
Ruibin Chang
0ec0ac109a ITE drivers/timer: don't divide free run count
We don't need to convert the free run clock count,
that will be converted by the kernel
(base on CONFIG_SYS_CLOCK_TICKS_PER_SEC),
so we should return the HW register count value directly.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2022-04-01 12:33:11 -05:00