Split the common keyboard scanning code out of the XEC specific driver
and use the generic code instead.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert the XEC keyboard scanning driver from kscan to input, add the
corresponding kscan compatibility node to the current board, build test
only.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add a blank define for the case where DMA channels are defined in ADC node
of the dts but STM32_ADC_DMA is not enabled. Otherwise compilation fails.
Also fix the way the DMA channel is configured by using a standard DT
macro, otherwise it doesn't work for dma-v2bis DMA types.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Taking a spinlock will result in interrupts being blocked in the MIPI
DBI driver, which is not desired behavior while issuing SPI transfers,
since the driver may use interrupts to drive the transfer
Fixes#68815
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
For simulation, let's convert the hardcoded DT/real
HW address to the valid addr for simulation on the fly.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The original calculation has two bugs. One is the calculated value, and the
other is that the value is not in one-millionth parts.
What the original calculation does is compute a scaled position value by
multiplying the raw sensor value (`dev_data->position`) by
`AS5600_FULL_ANGLE`, which represents a full rotation in degrees. It then
subtracts the product of the whole number of pulses (`val->val1`) and
`AS5600_PULSES_PER_REV` from this scaled position value.
((int32_t)dev_data->position * AS5600_FULL_ANGLE)
- (val->val1 * AS5600_PULSES_PER_REV);
What you actually need is to extract the fractional part of the value by
taking the modulo of AS5600_PULSES_PER_REV from the scaled value of the
position.
(((int32_t)dev_data->position * AS5600_FULL_ANGLE)
% AS5600_PULSES_PER_REV)
Then convert the value to one-millionth part.
* (AS5600_MILLION_UNIT / AS5600_PULSES_PER_REV);
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Convert the internal uint16_t data of the driver to an internal type
that automatically switches from uint8_t to uint16_t depending on
whether any 16 bit device is present in the system or not. This shrinks
the internal structures by few bytes when the extra data is not needed.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Include into compilation the nrfx_gppi_dppi_ppib helper and related
interconnect layers when DPPIC nodes are enabled in DTS. Provide macro
definitions required by those interconnect layers based on information
from devicetree (the nrf_grtc_timer is only modified because a macro
that it uses became more generic).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
ESP32 uart driver requires uart port number to its low level calls.
In case uart0 is disabled and uart1 is enabled, driver will set
default port num to 0 when it should be 1. This fixes this scenario
by retrieving uart pot number based on periphral address.
Fixes#69973
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add a new CAN controller API function can_get_min_bitrate() for getting the
minimum supported bitrate of a CAN controller/transceiver combination.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Allow frontend drivers based on the SJA1000 backend to specify a minimum
supported bitrate.
The ESP32 TWAI supports bitrates from 25kbit/s to 1Mbit/s.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for specifying the minimum bitrate supported by a CAN
controller in CAN_DT_DRIVER_CONFIG_GET() and
CAN_DT_DRIVER_CONFIG_INST_GET().
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add new devicetree bindings for F4 and L1 series for configuration of
block size used in flash write operations.
Allow byte-size write operations in `flash_stm32f1x.c`. This file is
being shared between F0, F1, F3, L0 and L1 series. L0 and L1 series
allows for single byte writes.
Signed-off-by: Gustavo Silva <gustavograzs@gmail.com>
Move 'reset' member, which is const, from driver data to driver config.
This allows to reduce flash usage by few bytes.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
The only difference is calling HAL_MMC_*() instead of HAL_SD_*() functions,
and removing the card detect logic.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Presently, this driver cannot handle multiple
DACs of the same type without throwing a
compile error due to a missing line ending.
This PR fixes that issue by adding the missing
line ending.
Signed-off-by: Kyle Kotowick <kotowick@invictonlabs.com>
Exclude devices based on ST SPI protocol v2 from special handling of
hci_reset opcode as it is redundant.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
Add raw mode in ST HCI SPI BT driver to support host-less configuration.
Remove compilation dependency for BT_QUIRK_NO_RESET as it applies to all
configurations.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
478530ec0aa1fe5f481786c25d50f7a081b22208 introduced a bug
where if the DT index while iterating its DT structure
initialization does not match the actual peripheral instance,
or if the device instance string is not just a simple integer,
but a more complex string like "00", or "02", either
the wrong peripheral address would be used, or the file
would failt to compile.
Let's fix this by reverting that change, and instead, for
simulation converting the hardcoded DT/real HW address
to the valid addr for simulation on the fly.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add Nuvoton numaker series flash memory controller(RMC) with erase,
read & write features of soc-flash.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Added the STM32G0X SOC series to the list of SOC that need to disable the
ADC while setting the oversampling bits to prevent writing over the
CKMODE bits.
Signed-off-by: Alexandre Poizat <apoizat@kalrayinc.com>
The ISR prototype is not matching the
signature for interrupt handlers, which results in
build warnings.
Let's fix it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Fix issue related to "generic SPI" mode only, when a packet of
1512 bytes is received, net_pkt_write() fails and thrwos the error:
"Still some length to go 2".
This is due to net_pkt_rx_alloc_with_buffer() allocating a maximum
mtu/size of 1514, and driver is not removing 4 bytes of crc32 from
rx buffer, that comes to be 1516 (2 bytes over buffer limit).
Fix generic SPI rx frame size removing crc32 bytes.
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
Add Open Alliance spi protocol support.
Open Alliance is a chunk-based SPI protocol, based on sending
over SPI an ethernet frame divided in smaller chunks, using a
specific 32-bit header for each chunk transferred. All chunks
can be sent or received by a single dma transfer.
Default mode is set to Open Alliance SPI without protection,
since the adin2111 dev. board comes shipped this way.
Tested:
- Open Alliance SPI, no protection (default board shipped)
- Open Alliance SPI, protection
- Generic SPI, no crc
- Generic SPI, with crc8
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
After some debugging related to non-working "Generic SPI without CRC"
mode in eval_adin2111_ebz (CONFIG_ETH_ADIN2111_SPI_CFG0=n), noticed
that even after proper STATUS0 RESETC bit detection, registers,
for a certain period (some msecs) still reads as zero.
This patch fixes adin2111_await_device and with it the
"Generic SPI without CRC" mode.
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
Enable appending of a crc32 at the end of the frame by the MAC,
always. This is always needed since the driver is not adding it.
This field has nothing to do with Generic SPI protocol-related
8-bit CRC, so this patch removes the CONFIG_ETH_ADIN2111_SPI_CFG0
choice related to this setting.
Testing without this flag set, packets are not forwareded in the
network, since the driver is not appending any crc32 header
to the frame.
Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
In the case that there are no more ISO buffers left,
"No available ISO buffers" is logged. However, given the
nature of ISO where we are (very) likely to get additional ISO
very soon after (typically every 7.5 or 10ms for audio),
this will get logged a lot, and the logging may in some
cases actually prevent the application from handling and
freeing existng buffers due to the immense logging,
which may make this (minor) issue into a blocking issue.
This is fixed by reducing the logging to the first
occurence, and then only every 100 afterwards, which has
shown to reduce the risk of this effectively blocking
the application.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Exhibit Renesas LCD controller's driver implementation. The driver
is intended to employ the controller in the continuous mode so
it can drive display panels in the parallel RGB mode.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
