Commit graph

23353 commits

Author SHA1 Message Date
Gerard Marull-Paretas
0aadc2dd44 drivers: serial: gd32: use clock control API
Use the clock control API to enable the UART clock.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Gerard Marull-Paretas
22e64fddfd drivers: pwm: gd32: use clock control API
Use the clock control API to enable/get rate of timer clocks.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Gerard Marull-Paretas
4fcc1dae0d drivers: i2c: gd32: use clock control API
Use the clock control API to enable/get rate of I2C clock.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Gerard Marull-Paretas
455b95b6c2 drivers: gpio,pinctrl: gd32: use clock control API
Use the clock control API to enable peripheral clocks. Note that both
GPIO and pinctrl drivers are updated at once since they share some IP
blocks.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Gerard Marull-Paretas
8d100f4f98 drivers: dma: gd32: use clock control API
Use the clock control API to enable DMA clock.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Gerard Marull-Paretas
8693a0b63f drivers: dac: gd32: use clock control API
Use the clock control API to enable peripheral clock.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Gerard Marull-Paretas
86654dbeae drivers: adc: gd32: use clock control API
Use the clock control API to turn on ADC clocks. Note that clock
selection is not yet implemented, so we still rely on custom rcu
properties for that.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Gerard Marull-Paretas
1c7138fbb1 drivers: adc: gd32: fix ADC clock source retrieval
The clock source is specified via rcu-clock-source in DT.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Gerard Marull-Paretas
4aa31b4526 drivers: clock_control: gd32: initial support
This patch adds a clock control driver for GD32 platforms. It is
important to note that the driver is only able to handle peripheral
clocks, but not "system clocks" (e.g. PLL settings, SYS_CK, etc.).  On
some similar platforms (STM32) this task is embedded in the same clock
driver, performed at init time but with no options to do any
manipulation at runtime via the API calls. The clock control API as-is
is really orthogonal to "system clocks", and it is arguably a bad idea
to embed system clock init code in a clock control driver. It can be
done at SoC level still using Devicetree as a source of hardware
description/initial configuration.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Declan Snyder
4baf7b9552 drivers: entropy: Disable CAAM driver
Temporarily disable CAAM driver because of bug in init on rt11xx

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2022-09-06 09:56:48 +02:00
Vinayak Kariappa Chettimada
3e5ea793b7 drivers: flash: nrf: Fix ticker stop user id value
Ticker stop callback are executing in ULL_HIGH priority,
correct the value to 1U instead of 0U which is for LLL
execution context of the Bluetooth Controller.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2022-09-05 17:36:48 +02:00
Vinayak Kariappa Chettimada
67cf435ae1 drivers: flash: nrf: Fix ticker stop synchronization
Fix usage fault due to spurious ticker timeout expiry post
enqueuing of ticker stop operation.

Use ticker operation callback to handle completion of ticker
stop operation and then give the semaphore to thread to
notifying the completion of flash operation.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2022-09-05 17:36:48 +02:00
Sylvio Alves
7fdde112d1 wifi: esp32: update enum naming reference
Due to Zephyr's WiFi updates, common private
enums used in `hal_espressif` are now being used.

This updates private internal values to meet hal_espressif
changes.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-09-05 15:32:34 +00:00
Sylvio Alves
a8cacfa530 wifi: esp32: add config to enable automatic DHCPV4 negotiation
ESP32 wifi connection uses Zephyr's net stack. Once WiFi connects
in station mode, is requires the application to handle DHCPv4
negotiation. This PR adds support to automatic negotiation by
handling the dhcpv4 calls in driver layer.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-09-05 15:32:34 +00:00
Sylvio Alves
7d9edc8bf0 wifi: esp32: add support to wifi api mgmt
Moved all MBEDTLS dependencies from prj.conf
to Kconfig as WiFi depends on it.

Update esp32 wifi driver to enable `samples/net/wifi`
to work. Commands as such as `wifi connect` and `wifi scan` are now
available.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-09-05 15:32:34 +00:00
Thomas Stranger
402752c07c drivers/can: move STM32FD clock divider configuration to dts
Remove the CAN_STM32FD_CLOCK_DIVISOR configuration option,
and add configuration via dts property clk-divider instead.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2022-09-05 14:44:45 +00:00
Thomas Stranger
09f45840f1 drivers/can: stm32fd fix not applied clock divider
The configurable CAN clock divider CAN_STM32FD_CLOCK_DIVISOR
was not applied during initialization, because write protection
was not disabled.

While the clock divider was not applied, it was still used in clock rate
calculation, therefore resulting in incorrect bus speed setup.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2022-09-05 14:44:45 +00:00
Thomas Stranger
a5cc6c2e16 drivers/can: stm32_fd: convert domain clk src sel. from kconfig to dts
Use domain clocks if they are defined in dts.

Until now domain clock sources could be selected via kconfig.
STM32 platform now can configure domain clock sources via
clock control driver, therefore this commit makes use of it.

The configuration is shared between canfd instances, so a domain clock
has to be defined for only one instance. Otherwise, only the
configuration from the latest initialized instance will remain.

The dependency on clock source PCLK1 for CAN_STM32FD_CLOCK_DIVISOR
was removed, because the divider also divides other clocks.
Note that setting that divider does not work at all at the moment,
because the write protection is not disabled.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2022-09-05 14:44:45 +00:00
Florian Grandel
c57650c403 net: context: clean up net_context_get()
* reduced cyclomatic complexity
* group validation by family to make the validation easier to understand
and extend
* change preprocessor markup where possible to allow for complete code
elimination when features (esp. IP) are disabled
* renamed net_context_get/set_ip_proto() to net_context_get_proto()

While the latter is formally part of the public API and might therefore
have to be deprecated rather than renamed, it is considered internal API
by the net developers, see
https://github.com/zephyrproject-rtos/zephyr/pull/48751#discussion_r942402612

Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
2022-09-05 14:35:17 +00:00
Florian Grandel
e608e92112 net: context: properly namespace can-related methods
The net_context_set/get_filter_id() methods are CAN specific and should
say so.

Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
2022-09-05 14:35:17 +00:00
Gerard Marull-Paretas
79e6b0e0f6 includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.

The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.

NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-05 16:31:47 +02:00
Erwan Gouriou
54302ac67d drivers: flash: stm32 ospi: Limit bytes read from DT SFDP table
In case SFDP table is provided via device tree, take care not reading
more than expected by the function caller as the result is written
in a structure which size is predefined by one specific byte in the
table, and could be smaller than the table size.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-05 10:17:21 +02:00
Jiafei Pan
8700d925b3 drivers: serial: remove soc.h from iuart
soc.h has been removed for ARM64 SoC platforms and it is also needed by
ARM32, so remove it from related drivers.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2022-09-05 10:17:13 +02:00
Jiafei Pan
1cf9858b4f drivers: pinctrl: remove soc.h from pinctrl_imx
soc.h has been removed for ARM64 SoC platforms and it is also needed by
ARM32, so remove it from related drivers.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2022-09-05 10:17:13 +02:00
Jiafei Pan
af0c47f7d8 drivers: clock_control: remove soc.h from mcux_ccm
soc.h has been removed for ARM64 SoC platforms and it is also needed by
ARM32, so remove it from related drivers.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2022-09-05 10:17:13 +02:00
Jiafei Pan
66414ef6e7 drivers: pinctrl: fix imx pinctrl 64bit compatible
Make imx pinctrl driver to be aarch64 compatible.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2022-09-05 10:17:13 +02:00
Andrey Borisovich
2e04bfdfe0 soc: intel_adsp: Refactored IPC/IDC
Changes to code:
1. Renamed CAVS_IPC API from common/include/cavs_ipc.h to
common/include/intel_adsp_ipc.h. Renamed all API functions and structs -
added "intel_adsp_" prefix.
2. Moved definitions from intel-ipc-regs.h and ace-ipc-regs.g to SOC
specific headers include/<soc_name>/adsp_ipc_regs.h.
3. Added new common intel_adsp_ipc_devtree.h header with new
macros to retrieve IPC and IDC nodes and register addresses.
Put those new macros in code replacing hardcoded values outside of
devicetree.
4. Changed documentation of IDC and renamed IDC register struct
to have common name between all intel adsp socs.
5. Removed excessive docs description on cAVS IPC protocol.

Changes to Devicetree:
1. Renamed in all CAVS boards .dtsi files content in IPC nodes:
   - "cavs_host_ipc" node labels to "adsp_ipc" labels.
   - compatible "intel,cavs-host-ipc" renamed to
     "intel,adsp-host-ipc".
2. Added (previously missing) yaml file for "intel,adsp-host-ipc"
   compatible.
3. Renamed in all CAVS boards .dtsi files content in IDC nodes:
   - "idc" node labels to "adsp_idc" labels.
   - compatible "intel,cavs-idc" renamed to "intel-adsp-idc"
4. Renamed intel,cavs_idc.yaml file to intel,adsp_idc.yaml
   so it is suitable for both CAVS and ACE SoC family.
   Moved it from ipm bindings to ipc bindings where it belongs.

Changes to Kconfig:
1. Renamed existing Kconfig option CONFIG_CAVS_IPC to
   INTEL_ADSP_IPC.
2. For renamed INTEL_ADSP_IPC addded default value based on
   status of the "adsp-ipc" and "adsp-ipc" node.

Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
2022-09-02 08:18:32 -04:00
Gerard Marull-Paretas
082043c6e8 drivers: display: intel_multibootfb: convert to DT
Convert the device to be Devicetree based. Adjusted tests and other
areas that were using old Kconfig properties.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-02 14:16:08 +02:00
Gerard Marull-Paretas
6a4409d8a0 drivers: display: intel_multibootfb: remove data accessor
config/data accessors have been removed from all (or most) in-tree
drivers, do the same here.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-02 14:16:08 +02:00
Gerard Marull-Paretas
11860face3 drivers: display: framebuffer: rework to make it self-contained
The "framebuf" driver was an incomplete driver expecting _clients_ to
implement missing functionality (i.e. init and device definition)
outside of the driver. This pattern of scattering driver code throughout
the tree is not common (if used at all). If certain drivers share
functionality, one can create a common module within the subsystem (see
e.g. ILI9XXX drivers).

The _generic_ framebuffer code was only used to implement the Intel
Multiboot framebuffer driver. This patch centralizes all the scattered
code in the subsystem and adjusts the driver name to "intel_multibootfb"
to make things clear. If there's ever another framebuffer driver that
shares code, it can be split into multiple modules.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-02 14:16:08 +02:00
Kumar Gala
576d3fe84f drivers: ec_host_cmd_periph: Update Kconfig
Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-09-02 11:22:39 +00:00
Andrew Hedin
715c2e63a0 modem: hl7800: Configure name for work queue
Prevent blank entry in kernel stacks shell command output.

Signed-off-by: Andrew Hedin <andrew.hedin@lairdconnect.com>
2022-09-02 11:06:11 +00:00
Marcin Niestroj
cf4578bdda drivers: usb_dc_rpi: set thread name
Thread name is useful when debugging or using shell with
CONFIG_THREAD_NAME=y.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2022-09-02 11:00:48 +00:00
Marcin Niestroj
966738db2c drivers: usb_dc_mcux: set thread name
Thread name is useful when debugging or using shell with
CONFIG_THREAD_NAME=y.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2022-09-02 11:00:48 +00:00
Marcin Niestroj
de36a7d7f4 drivers: usb_dc_kinetis: set thread name
Thread name is useful when debugging or using shell with
CONFIG_THREAD_NAME=y.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2022-09-02 11:00:48 +00:00
Marcin Niestroj
1e982fffd2 drivers: usb_dc_rpi: create thread and connect IRQ during init
So far thread was created as part of usb_dc_attach() by k_thread_create().
This means that if following function were executed:

 * usb_enable()
 * usb_disable()
 * usb_enable()

then k_thread_create() was called second time. This results in undefined
behavior.

Fix above issue by moving k_thread_create() invocation to function called
during system initialization.

While at it, move IRQ_CONNECT() and irq_enable() invocations to init as
well.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2022-09-02 11:00:48 +00:00
Marcin Niestroj
e4480d6ab6 drivers: usb_dc_mcux: create thread and connect IRQ during init
So far thread was created as part of usb_dc_attach() by k_thread_create().
This means that if following function were executed:

 * usb_enable()
 * usb_disable()
 * usb_enable()

then k_thread_create() was called second time. This results in undefined
behavior.

Fix above issue by moving k_thread_create() invocation to function called
during system initialization.

While at it, move IRQ_CONNECT() and irq_enable() invocations to init as
well.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2022-09-02 11:00:48 +00:00
Marcin Niestroj
9de245a588 drivers: usb_dc_kinetis: create thread and connect IRQ during init
So far thread was created as part of usb_dc_attach() by k_thread_create().
This means that if following function were executed:

 * usb_enable()
 * usb_disable()
 * usb_enable()

then k_thread_create() was called second time. This results in undefined
behavior.

Fix above issue by moving k_thread_create() invocation to function called
during system initialization.

While at it, move IRQ_CONNECT() and irq_enable() invocations to init as
well.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
2022-09-02 11:00:48 +00:00
Erwan Gouriou
e8e72882e1 drivers: timer: stm32: Check return of clock functions
That will speed up debugging.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-02 10:41:59 +00:00
Erwan Gouriou
7f2cb0fd22 drivers: timer: stm32: Specific handling for L0 LSI
On L0 series, LSI runs at 37KHz while LPTIM driver only supports speeds
up to 32768Hz (to avoid counter overflow). Consequence is a time running
faster than reality (x1.13)
Solution to this is the implementation of the LPTIM prescaler support.

While moving driver configuration from Kconfig to DT, this case was
not taken into account and the effect was LPTIM counter overflow which
consequence is worse than the slightly faster timer.
Reproduce the initial behavior with this piece of code that will be
removed once prescaler support is available.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-02 10:41:59 +00:00
Erwan Gouriou
16c11138d5 drivers: timer: stm32: Adapt SYS_CLOCK_TICKS_PER_SEC
When using LPTIM as tick source, tick freq (SYS_CLOCK_TICKS_PER_SEC)
needs to be adapted to get a precise tick to LPTIM freq ratio.

This adaptation was done easily using Kconfig up to now (under
soc/st_stm32/common/Kconfig.defconfig.series).
Since driver is configured using device tree, this method should
be adapted. For the LSI case (default Kconfig case), rely on the
existing mecanism, which is also still used by OOT users.
For the LSE case, force the value manually in boards forlder.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-02 10:41:59 +00:00
Erwan Gouriou
d056be2b38 drivers/timer: stm32: Re-instantiate warning message on lptim configuration
Following transition of lptim timer configuration from Kconfig to DT,
a warning message was set to inform users about this deprecation.
Due to errors in CI this message had to be removed while fixing the related
issues.
Now these issues are fixed, set the deprecation message again.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-02 10:41:59 +00:00
Erwan Gouriou
f818b0478d drivers/timer: stm32: Enable lptim driver based on dt status
Similarly to other drivers, use auto generated DT_HAS_<COMPAT> Kconfig
symbol to control use of STM32 lptim driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-02 10:41:59 +00:00
Erwan Gouriou
680574f960 drivers: ethernet: stm32_hal: Rename flag.
Last HAL udpdates came with a fix on two ethernet flags:
- ETH_PTPTS*S*R_TSSARFE > ETH_PTPTS*C*R_TSSARFE
- ETH_PTPTS*S*R_TSSSR > ETH_PTPTS*C*R_TSSSR

Update driver to be aligned with these changes.

Fixes #49763

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-09-02 10:37:49 +00:00
Vijay Hiremath
f262b795b8 eSPI: npcx: Enable platform specific Virtual Wire GPIOs
Added code to enable platform specific Virtual Wire GPIOs. With this
change, able to send the USB-C overcurrent Virtual Wire event to
Meterolake SOC.

Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
2022-09-02 10:36:24 +00:00
Andreas Sandberg
f62dc249a0 drivers: uc81xx: Add workaround for chips without autocopy
The UC8176 doesn't automatically copy writes to the buffer containing
the old SRAM contents. In this case, we need to manually copy data to
the back buffer.

Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
2022-09-02 11:21:08 +02:00
Andreas Sandberg
c276f834e0 drivers: uc81xx: Make it possible to override PLL/VDCS
Some custom refresh profiles need to set the PLL and VDCS
registers. Add them as optional DT properties.

Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
2022-09-02 11:21:08 +02:00
Andreas Sandberg
d571b3136d drivers: uc81xx: Add support for overriding LUTs
Add support for overriding display LUTs in the UC81xx driver. This
makes it possible to use different LUTs for the full and partial
refresh profiles.

Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
2022-09-02 11:21:08 +02:00
Andreas Sandberg
21208aae1d drivers: uc81xx: Add a separate partial refresh profile
Add a separate profile for partial refreshes. This makes it possible
to specify a separate refresh configuration for partial and full
refreshes.

The driver now transitions to full refresh mode when blanking is
turned on. It transitions back to partial refresh mode when there is a
write while blanking is off.

Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
2022-09-02 11:21:08 +02:00
Andreas Sandberg
957e22976d drivers: uc81xx: Specify overrides in a DT child node
Introduce the concept of refresh profiles which are specified as a
child node in the device tree. This makes it possible to use different
overrides for different types of refreshes (full/partial).

The only profile that is currently supported is the "full" profile.

Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
2022-09-02 11:21:08 +02:00