Update ESP AT modem driver to control the network interface dormant
state based on the network connection status, as described in the docs.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
SIUL2 may require multiple interrupt handlers instead of a single one as
currently supported for S32Z/E. This is needed to enable support on
S32K3.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Support pin control for NXP S32K3 devices and enable it by default on
mr_canhubk3 board configuration.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The clock controller is a singleton controller for all the system-level
clocks (XOSC, PLL, CGM, etc) to provide run-time information to the
peripheral device drivers about the module's clocks.
Clock configuration is not yet supported.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Split the SDL GPIO emulator driver in a top and bottom
to enable using it with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Split the SDL input driver in a top and bottom
to enable using it with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Split the SDL display driver in a top and bottom
to enable using it with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Merges the condition for `UART_INTERRUPT_DRIVEN || UART_ASYNC_API` into
`UART_MCUX_FLEXCOMM_ISR_SUPPORT`.
Signed-off-by: Alp Sayin <alpsayin@gmail.com>
When UART_INTERRUPT_DRIVEN=n, mcux_flexcomm_isr and the data structure
inside is left unused. This patch turns off the build of the entire ISR.
Signed-off-by: Alp Sayin <alpsayin@gmail.com>
without the call of LPUART_ClearStatusFlags(), the interrupt can
immediately trigger again, blocking the application.
CONFIG_ASSERTS=n removes the assert() including the call of
LPUART_ClearStatusFlags().
Also removed LPUART_ClearStatusFlags call for unclearable
kLPUART_TransmissionCompleteFlag.
Signed-off-by: Jan Peters <peters@kt-elektronik.de>
Since clocks aren't declared in the devicetree for the stm32mp1
co-processor. Read the resulting clock divider here instead.
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
Since clocks aren't declared in the devicetree for the stm32mp1
co-processor. Read the resulting clock divider here instead.
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
Add a small delay between reading the transport header and reading the
HCI data. Failing to do so on a nRF9160<->nRF52832 link was reliably
resulting in the nRF9160 trying to read data before the nRF52832 had
set up the SPI transaction, resulting in the host reading a buffer full
of 0x00 and having to run the entire read result again.
Transceiving a 10 byte packet takes at least 31uS, while 100 byte
packets are around 150uS (duration of `spi_transceive` call). Waiting
1 tick to eliminate the need for most retransmissions is a valid
tradeoff.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add an option that signifies that the ESP modem may be reset at the same
time as the SoC by an external source. When this is the case, we first
wait for an unsolicited "ready" message from the modem, before
attempting to reset the device. This prevents two initialisation
sequences attempting to run at the same time.
We still want to wait for the complete initialisation sequence to
complete before returning in this case.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Don't unconditionally set the carrier to the off state in
`esp_iface_init`, as this is already done in `esp_reset` and the
function may be called after the modem has already completed the init
sequence and called `net_if_carrier_on`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Wait for the init process to finish again, previously removed in
a8e6fc0b83. The original reasoning (deadlock with net interface locking)
no longer applies now that `esp_reset` is called in the device init
function, not in `esp_iface_init` (332a6f084a).
Without this change, if `reset-gpios` or `power-gpios` is set,
`device_is_ready` will return true even if the chip has fallen off the
board, as no communication is validated with the board.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Support device power management in spi_nor driver. Only use
SUSPEND/RESUME if `CONFIG_SPI_NOR_IDLE_IN_DPD` is not enabled to avoid
state conflicts.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Quite a few of the drivers meant for the POSIX arch
interacted with the host directly, and will not
work when we use an embedded libC.
Until we fix them, let's add the appropriate
kconfig dependencies to avoid users trying to build them.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This adds support for the TIMER1-4 counter.
Each counter has 24bits and can run on LP_CLK (15-32KHz)
or DIVN clock (32MHz) with prescaler 1-32.
Each counter can have one alarm set.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Enable automatic temperature measurements during charging.
Allows the PMIC to charge when the host is in low power mode.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
The vbus current limit is now written to the vbus startup
register. It is now applied at all times and does not need
to be updated on charger insertion.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Because they are needed in SoC power.c, clock control init functions
for all other STM32 series has been exported as global.
This commit exports stm32_clock_control_init function as global for
STM32H7 series as well, making custom power management
implementations for STM32H7 series possible.
Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
NO_CACHE cannot be selected for certain cores.
Use ARCH_HAS_NOCACHE_MEMORY_SUPPORT as the condtion
to select NO_CACHE config
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The blink command should blink until the user presses a key, however on
some systems a pending keypress is present when entering the loop
causing it to immediate exit before getting a chance to blink.
Add a dummy read to clear the buffer before starting the blink loop.
Signed-off-by: Eric Holmberg <eric.holmberg@northriversystems.co.nz>
The device passed to the DMA callback is the DMA device. Instead use
the ADC device available in the private data.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
Add fixed-clock clock control driver. This is a first step towards
making fixed-clocks a first-class citizen in the clock control
framework.
Since the change is hidden behind a Kconfig enable this is opt-in
for now.
Signed-off-by: Moritz Fischer <moritzf@google.com>
This adds a driver for Texas Instruments Cost-Optimized, Ultra-Small,
12-Bit, System-Monitoring ADCs. Currently only TLA2021 is supported,
TLA2022 and TLA2024 may follow based on this driver.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
A "switch" statement in intel_adsp_hda_dma_status() seems to be
missing a "break". The second "break" is unneeded but seems to be a
part of the coding style.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This driver, due to its limited 24-bits counter, is already tracking a
cycle count in software. Allow that count to be a 64-bits value so this
won't wrap in a matter of only a few seconds when the hardware clock
is fast.
This is very cheap to do as expensive math operations (i.e. divisions)
are performed only on counter intervals whose values fit in 32 bits like
before.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Add ACPI support for Zephyr using acpica open source
project. ACPI subsystem use to discover and configure
hardware components, perform power management (e.g. putting
unused hardware components to sleep), auto configuration (e.g.
Plug and Play and hot swapping) etc.
Signed-off-by: Najumon Ba <najumon.ba@intel.com>
To ease building for workstation tests, instead of using
the ARM CMSIS instructions instrinsics directly,
use the NRFX macro that uses the compiler builtins when
necessary.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Instead of getting the hardcoded address from the DT structure
use its symbolic name (Also from DT) which will be resolved
by the nRF HAL definitions.
This allows the GPIO peripherals' addresses to be redefined
for the simulated targets.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Following the sam4s datasheet, the OVRE, PARE and FRAME flags should be
cleared after a uart error occured. This is done writing a 1 to the
RSTSTA bit in the UART_CR.
Signed-off-by: Ibe Van de Veire <ibe.vandeveire@basalte.be>
Default scan mode is Active. User can force the scan mode to passive
through Kconfig option or using 'passive' option from shell.
Using either of this option will override regulatory settings and
forces all scan channels to be passive only.
Signed-off-by: Ajay Parida <ajay.parida@nordicsemi.no>
Convert the XPT2046 driver to the input subsystem, change the api,
remove the callback and enable logic.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix incomplete reset cause to be reported for NXP MIMXRT1062-evkb.
In the event of a reset due to core lockup
or software reset request on a 1062 board,
the current NXP hwinfo driver reports an incomplete
reset cause (only Ipp reset pin).
This is happening because the 1062 uses a combined CPU lockup
and system reset request register bit that should be checked,
whereas the current driver only checks for the existence
of a lockup-only status bit.
This commit adds a check on the flag
FSL_FEATURE_SRC_HAS_SRSR_LOCKUP_SYSRESETREQ
already present in MIMXRT1062_features.h,
to report such a reset cause should it occur.
Signed-off-by: Casper Egholm Jørgensen <cjo@trackman.com>
Identify the Wi-Fi capability to the networking stack and also the type
of Wi-Fi (Native vs Offloaded), this helps identifying Wi-Fi interfaces
that can be used by applications.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
