Updated revision for hal_ethos_u module, and adapted
ethosu_semaphore_take function prototype accordingly in order to align
with changes in the NPU driver
Signed-off-by: Ledion Daja <ledion.daja@arm.com>
Applying the modern way which is adding `default y` and
`depends on DT_HAS_...` to enable configs.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Removing `choice WS2812_STRIP_DRIVER` to enable the use of multiple
types of WS2812 drivers.
Also, `menuconfig WS2812_STRIP` will be deleted as it does not
correspond to the appropriate settings.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
uart flexcomm driver incorrectly used kStatus enum as mask when
checking for errors and enabling the error interrupts.
Signed-off-by: Johan Carlsson <johan.carlsson@teenage.engineering>
Enable support for setting and querying the FlexSPI clock rate to the
clock_control_mcux_syscon driver, as this is required by the
flash_flexspi_nor_driver
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
As we are replacing native_posix with native_sim, let's
use native_sim instead of native_posix as example platform.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add a dummy IPSR flag to the RCar PFC driver. It is necessary
to ensure that the driver sets the 'peripheral' bit (the driver
resets this bit during the first call of 'pfc_rcar_set_gpsr') for
a pin that doesn't have a pin function defined in IPSR, but always
acts as a 'peripheral', for example, the MMC pins on the Spider
board.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Split up the driver for the PWM controller MAX31790
into a multi function device driver.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Move the pmw3610_spi_clk_on and pmw3610_spi_clk_off calls so that the
"on" call is before the first write. The datasheet calls for doing this
before any write operations, though some writes seems to work without
this in place, other seems to behave erroneously.
The non static functions do it on their own as they can be called
separately.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Align driver implementation to the watchdog driver API.
https://docs.zephyrproject.org/latest/hardware/peripherals/watchdog.html
int wdt_disable(const struct device *dev)
shall return:
0 – If successful.
-EFAULT – If watchdog instance is not enabled.
-EPERM – If watchdog can not be disabled directly by application code.
-errno – In case of any other failure.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Syscon clock driver previously used a sequence where clock IDs increased
sequentially. This had a few disadvantages:
- if a new SOC was introduced with more instances of a given IP, the
clock ID could not be sequential with the remaining IDs
- chance of collisions between clock IDs was relatively high
To resolve this, define LPC clock IDs using a bitmask macro. Note that
the CTIMER clock IDs are used within SOC clock files to perform clock
init, and the macro requires that the clock ID expand to an integer
rather than a expression with bitshifts (hence why the macro is not used
for these IDs)
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
When running SOF on Intel ADSP we choose to only serve the timer
interrupt on the primary core.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Some SAI instances are mutliline, meaning they can have multiple
TX/RX data lines (channels). Depending on the board, the index
of the TX/RX data lines that are connected to the consumer
(e.g: the codec) may not always be 0. This commit fixes this
issue by adding support for passing the index of the used
TX/RX data lines through the DTS.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
In the interrupt pending routine, only the interrupt status needs to be
cleared at the end of the interrupt routine. There is no need to do a
hardware reset(HALT) to avoid clearing the next transfer interrupt when
the current transfer is completed.
Test: Testing this function does not cause I2C data/clk to get stuck on
the system platform.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Use the CAN clock and configuration ranges recommended by CAN in Automation
(CiA). Adjust the CAN shell test, which makes use of the fake CAN
controller driver, to match the new timing limits.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
For certain peripheral signal lines in nRF54H20, it is required
to set the clockpin bitfield for pins assigned to them, otherwise
the peripheral may not work properly, for example, there will be
no output from UART.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
RW61x DMA has the *unique* restriction that DMA access is not routed
through the FlexSPI cache engine, only via the non-cached address space.
To enable DMA to read from the FlexSPI AHB space directly, fixup any
address passed to the DMA engine that is in the FlexSPI AHB cached
region to be in the non cached region
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Rework the driver to use HW MAC address filtering as an ethernet
capability.
Use a counter table for CRC indexes added/removed.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Firstly, build-asserting the execution/source memory sizes to be equal
wasn't working, due to the wrong (non-inst) DT API being used.
Secondly, this assert can be relaxed so that the source memory region
only needs to have greater than or equal size to the execution region,
as VPR firmware needs to fit into execution memory first and foremost.
This will come in handy, since MRAM partitions (typical source memory)
have stricter alignment requirements than RAM regions.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Include soc.h in nxp MRT driver, so that CMSIS register definitions will
be available in this file
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit enhances the accuracy of hardware cycle calculation before
setting the IT8xxx2 event timer. The next target cycle is calculated by
the last, elapsed, and expected timeout ticks. And then, the difference
in hardware cycles between the target cycle and the current cycle is set
into the event timer. This increased accuracy effectively resolves the
clock drift issue.
Tested with:
west build -p always -b it8xxx2_evb tests/kernel/timer/timer_api
-T kernel.timer.tickless
west build -p always -b it8xxx2_evb tests/kernel/timer/timer_behavior
-T kernel.timer.timer
Fixes#67474#67833
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
Default MAX_DATA_SIZE might be too small depending
on application (e.g. handling the scan result with 12 APs detected)
Added config option for MAX_DATA_SIZE and warning for the user
Signed-off-by: Samy Francelet <samy.francelet@ik.me>
Use SPI_LOCK_ON to lock configuration for multiple transaction while CS is
kept low.
Change control of CS line from direct GPIO manipulation to SPI driver API.
Signed-off-by: Michele Sardo <msmttchr@gmail.com>
Keep the SPI enabled when performing multiple transaction with
SPI_HOLD_ON_CS.
In such case, the end of transaction is marked by application calling
spi_release.
Signed-off-by: Michele Sardo <msmttchr@gmail.com>
Use the nrf_reset_network_force_off() function to release and set the
force-off signal.This ensures that the workaround for errata 161 is
applied.
Signed-off-by: Vidar Berg <vidar.berg@nordicsemi.no>
The expression (options & WDT_OPT_PAUSE_IN_SLEEP) is duplicated. Fix it
by replacing the second one with (options &WDT_OPT_PAUSE_HALTED_BY_DBG).
Signed-off-by: YunZe Li <yzli.cs@realtek.com>
