Remove excessive debug logging from the SJA1000 driver backend. Logging
each register access makes generic CAN debug logging unusable.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add padding to the header and remove unnecessary memset in order to fix
alignment faults in cores such as M0 or ones that support
CONFIG_TRAP_UNALIGNED_ACCESS
Signed-off-by: Yuval Peress <peress@google.com>
The rpmsg_close() call uses the HCI reset command to reset the
controller. But when building as controller-only we do not bring in the
infrastructure to send HCI commands (nor should we) and rpmsg_close()
will not be called anyway.
Fixes#63534.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The code is designed to handle RF0L and RF1L in
line 1, but they were being sent to line 0. Becuase
they weren't handled, the interrupts would never
be handled which locked up the chip.
Signed-off-by: Abram Early <abram.early@gmail.com>
Prevent use of isochronous endpoints as bulk and/or interrupt endpoint.
The issue was observed when trying to use 4 CDC ACM instances where the
4th instance would claim the isochronous IN endpoint 0x88 to be bulk.
Because the isochronous endpoints cannot respond with handshake packet
the iso endpoints cannot be used as bulk or interrupt substitue.
Properly fail endpoint check and therefore make 4 CDC ACM instances not
enumerate at all because the hardware has endpoints that only allows up
to 3 CDC ACM instances.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The PCA9633 i2c LED controller offers an All Call address in its nominal
operation, allowing simultaneous communication with all instances present
on the same i2c bus. The default address is 0x70. While this functionality
is convenient, it is possible that the board uses another i2c component
that also uses this address (for example, the shtcx). In such cases, the
address conflict prevents the proper functioning of the system.
The idea is to add a "disable-allcall" property to the device tree. If this
option is present, the initialization of the PCA9633 forces the bit 0
(ALLCALL) to be set to false, thereby disabling this function. It is
necessary to add this property to all PCA9633 devices on the bus to free up
the address 0x70.
Signed-off-by: Steve Jacot-Guillarmod <steve@piziwate.net>
When the legacy LLCP implementation was removed this Kconfig option was
mistakenly left over. Remove it now with all its users.
Fixes#63212.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
`last_load` is the full N cycles and `SysTick->LOAD` should
be loaded with `last_load - 1` for the calculations work
correctly.
Note: This only affects a kernel in ticked operation.
Tickless kernels periodically restart the timer correctly.
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
The existing implementation did not properly
handle when `SysTick->VAL` is zero.
This caused three subtle edge cases:
* val1=0,COUNTFLAG=0,val2=0
This should result in no cycles elapsed,
however `(last_load - val2) = last_load`.
So an extra `last_load` cycles was returned.
* val1=0,COUNTFLAG=0,val2=(last_load-1)
This should result in 1 cycle elapsed,
however `val1 < val2` so an extra `last_load`
cycles was returned.
* val1=[2,1,0],COUNTFLAG=1,val2=0
This should result in `last_load` cycles elapsed.
However, `last_load * 2` cycles was returned.
To fix the calculation, val1 and val2 are first
wrapped/realigned from [0:last_load-1] to [1:last_load].
Tidy comments to better reflect the SysTick
behaviour and link reference manuals.
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
The workaround for the nRF52 anomaly 109 that is implemented in
the nrfx_pwm driver uses interrupts generated by a selected EGU
instance and by the enabled PWM instances (even if the interrupts
are not used in generation of the PWM output signals).
Add required IRQ_CONNECT calls so that those interrupts are
properly handled.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Not only the return code of TI's RF command queueing mechanism but also
the command status need to be checked to assert that a command was
executed successfully. This change introduces additional checking of the
command status.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The frequency synchronization command requires a proper frequency to be
set in order to be successfully executed. The command not being executed
leads to unnecessary internal error handling wrt command scheduling.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Moves the RX callback closer to where it's actually being used also
removing the necessity to declare a function prototype.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The driver API now distinguishes between operational UP/DOWN states as
required by Zephyr's network API and receiver on/off states as an
internal driver state for improved standard conformance.
This change closes the gap between the driver API requirements and the
implementation in this respect.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Replaces the mutex by a semaphore for ISR readiness as requested by the
driver API specification.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Checks whether the receiver is already on before trying to switch it on.
This also closes a gap wrt the driver API specification.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Restructuring and renaming of driver-internal functions for improved
readability and maintainability:
- distinguish between externally exposed API methods
(cc13xx_cc26xx_sub_* prefix) and internal helper methods
(drv_* prefix).
- extract a few functions to reduce complexity and improve re-use
Also removes unnecessary initial runtime blanking of static (.bss) data
in the newly introduced extracted buffer initialization functions.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The pre-alloacted size of the buffer for the SHA ROM API code increases
in npcx4 chip. This commit adds a new property context-buffer-size to
sha0 DT node in npcx9 and npcx4 separately. The driver can pre-allocate
buffer with the correct size based on the property.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Fixes an issue that reload mode is not disabled in case of an error.
From this case the driver could not recover because in msg_init()
no new transfer could be initialized.
Signed-off-by: Mario Jaun <mario.jaun@gmail.com>
Since 2f003e59 reworked the structure of k_mem_slab information fields,
we need to update the logging statements in the i2s_mcux_sai driver to
access these fields correctly.
Fixes#63527
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Different nRF52 devices have different maximum TWI DMA transfer size,
and it's easy to hit the limit with i2c displays on nrf52832 (8 bit) and
nrf52810 (10 bit). Currently neither the driver or the hal validate the
limit, leading to random NACK errors when trying to transfer more data.
Add a check on the driver to fail gracefully when going over the limit.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Define all the register offset directly in the driver according
to the RISCV PLIC specification as they are not configurable,
see: https://github.com/riscv/riscv-plic-spec.
Updated devicetrees that has PLIC accordingly.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Removing the edge-trigger Kconfig as it is supported by default
in the RISCV PLIC specifications.
Define the edge-trigger register offset in the driver instead
of retrieving the value from devicetree as it is not something
configurable. The value 0x1080 is defined in Andes & Telink
datasheets.
Updated build_all testcase.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Previously, the uart_emul device did not support interrupt-driven
receive, which is an unwritten requirement for hooking up a uart to
the Zephyr console driver.
The console is a fairly high-traffic subsystem, and we should be able
to perform more extensive testing on it, aside from maching twister
output against a regular expression. With this change, we can use
the emulation uart within the body of a ZTest.
Testing Done:
```shell
west build -p auto -b qemu_riscv64 -t run tests/drivers/console_switching
...
*** Booting Zephyr OS build zephyr-v3.4.0-4277-gae0d63471be1 ***
Running TESTSUITE console_switching
===================================================================
START - test_read
read "Hello, uart_emul0!" from uart_emul0
read "Hello, uart_emul1!" from uart_emul1
read "Hello, uart_emul0!" from uart_emul0
read "Hello, uart_emul1!" from uart_emul1
PASS - test_read in 0.005 seconds
===================================================================
START - test_write
wrote "Hello, uart_emul0!" to uart_emul0
wrote "Hello, uart_emul1!" to uart_emul1
wrote "Hello, uart_emul0!" to uart_emul0
wrote "Hello, uart_emul1!" to uart_emul1
PASS - test_write in 0.003 seconds
===================================================================
TESTSUITE console_switching succeeded
------ TESTSUITE SUMMARY START ------
SUITE PASS - 100.00% [console_switching]: pass = 2, fail = 0, skip = 0...
- PASS - [console_switching.test_read] duration = 0.005 seconds
- PASS - [console_switching.test_write] duration = 0.003 seconds
------ TESTSUITE SUMMARY END ------
===================================================================
PROJECT EXECUTION SUCCESSFUL
```
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Zephyr's code base uses MP_MAX_NUM_CPUS to
know how many cores exists in the target. It is
also expected that both symbols MP_MAX_NUM_CPUS
and MP_NUM_CPUS have the same value, so lets
just use MP_MAX_NUM_CPUS and simplify it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The instruction length can only be 0~5.
Use am_hal_iom_blocking_transfer and specify clearly the TX/RX direction.
Hold CS to continue to RX expected response after instruction transmission.
Signed-off-by: Aaron Ye <aye@ambiq.com>
The commit fixes the SPI mode improper configuration.
Otherwise the MODE_3 and MODE_0 cases would never be entered as expected.
Signed-off-by: Aaron Ye <aye@ambiq.com>
Flash is clocked with HCLK, while CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
reflects SYSCLK. HCLK = SYCLK / AHB prescaler.
When dealing with flash latency, use HCLK instead of SYSCLK.
This changes reverts a abusive change done in an old commit (efd8ee465c)
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Latency should be set before HCLK clock increase. Not doing so can result
in broken behavior.
For instance, at startup, MSI is @4MHz on L4 series.
If MSI is required to be configured at 48 MHz for future use a USB clock,
this will be done in set_up_fixed_clock_sources(). If flash latency is
not correctly set at this point fetching flash will fail..
Move flash latency configuration before setting up fixed clocks.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
This commit adds a timeout of 300ms to the generic (gsm_ppp) init
chat script. This delay is required for some modems (discovered on
a Telit ME910G1-WW) to allow it to enter CMUX mode. Without this
delay, the modem simply refuses to respond to any CMUX commands.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Decouples the generic MII PHY driver from the adin2111 driver by making
it depend on an ethernet-phy compatible devicetree node rather than the
adin2111 driver not being enabled. This makes it possible to add the
adin2111 driver to tests/drivers/build_all/ethernet
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Simplifies the adin2111 ethernet driver to use the generic driver class
initialization priority instead of a driver-specific priority.
Suggested-by: Georgij Cernysiov <geo.cgv@gmail.com>
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
The adin2111 ethernet driver supports both adi,adin2111 and adi,adin1110
devicetree compatibles, however it failed to build when both compatibles
existed in the same devicetree. This may be an unusual configuration for
real systems, but was found when extending
tests/drivers/build_all/ethernet to cover both compatibles.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
Remove unnecessary calls to __ASSERT_NO_MSG() in CAN controller driver
timing setter callbacks. The CAN API functions can_set_timing and
can_set_timing_data() already provide run-time timing parameter validation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
I2C scan might fail as peripheral is still busy completing last
operation. This makes sure transfer call waits for free line.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Commit 2f003e59e4 ("kernel: Re-factor k_mem_slab definition") moved
block_size into from k_mem_slab to k_mem_slab_info without updating i2s
handlers. Use the new member to fix build failures.
Fixes: #63363
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The current approach is a bit impractical in the upper layer.
This patch removes the two fifos that hold the transfer buffers
and replaces them with a byte array for the setup packet and
a pointer to a data buffer. The data buffer is mandatory for
all types of transfers except control without a data stage.
The waste of eight unused bytes for non-control transfers should
be insignificant, since an additional pointer would be at least
half of it, and then there would be the overhead of handling it.
This patch also clean up the transfer flags, rename owner to callback
as it reflects the upper layer use case, and add an additional member
to hold the pointer to the USB device (peripheral on the bus).
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Aling with the changes in UDC done in the commit ad81b3b797
("drivers: udc: move transfer status to buffer info structure")
This allows us to get the result of synchronous transfer and
simplify uhc_submit_event().
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This continue PR #31270. The updated changes are:
- Updated to work with latest zephyr
- Inplace reads/writes of registers
- Batch read of RX messages when multiple messages can be read
- FIFO abstraction of RX/TEF queues
- Handle ivmif errors
- Use READ_CRC for register reads
- Use bitmasks instead of bitfield members
- Rename mcp25xxfd to mcp251xfd
- General cleanups
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
The `SOC_NRF53_RTC_PRETICK` option is now allowed to be used with
`NRF_802154_RADIO_DRIVER`.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
The nrf53 pretick can be used with non-zero
`NRF_RTC_TIMER_USER_CHAN_COUNT` Kconfig option.
The nrf53 pretick requires just one RTC1 CC channel.
The nrf53 pretick handles also RTC1 and RTC0 both CCs and OVERFLOW
events by examination of events scheduled on them. The pretick is set
based on number of ticks to the closest event scheduled that can trigger
an interrupt.
Because the operation in `z_arm_on_enter_cpu_idle` hook would
take too much time with interrupts disabled, the
`z_arm_on_enter_cpu_idle_prepare` hook enabled by Kconfig option
`ARM_ON_ENTER_CPU_IDLE_PREPARE_HOOK` is used. It performs RTC0 and RTC1
examination, and sets pretick without interrupts being blocked.
The LDREX/STREX are leveraged to detect if exception took place
between start of `z_arm_on_enter_cpu_idle_prepare` and
`z_arm_on_enter_cpu_idle`. If exception has not been taken, the pretick
calculation can be trusted because source data could not changed and
too much time could not pass. Otherwise the sleep attempt is disallowed,
the idle will loop again and try later.
Prompt for `SOC_NRF53_RTC_PRETICK` Kconfig option allows to control
this option by an user and turn the feature off if necessary.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
